global: Migrate CONFIG_SH_ETHER_PHY_ADDR to CFG

Perform a simple rename of CONFIG_SH_ETHER_PHY_ADDR to CFG_SH_ETHER_PHY_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/README b/README
index 5f688d70f32f551410294e4af97757bb75300a94..217fbaf55757bbea2fd4205fcb60ccdec7760c69 100644 (file)
--- a/README
+++ b/README
@@ -544,7 +544,7 @@ The following options need to be configured:
                        CONFIG_SH_ETHER_USE_PORT
                        Define the number of ports to be used
 
-                       CONFIG_SH_ETHER_PHY_ADDR
+                       CFG_SH_ETHER_PHY_ADDR
                        Define the ETH PHY's address
 
                        CFG_SH_ETHER_CACHE_WRITEBACK

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 0053733075edf1bdada2932c3b8c1090bb3bd2ee..3bf94cb2f7eb568c56ff6cb898442e2e2b2b2414 100644 (file)
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -33,8 +33,8 @@
 #ifndef CONFIG_SH_ETHER_USE_PORT
 # error "Please define CONFIG_SH_ETHER_USE_PORT"
 #endif
-#ifndef CONFIG_SH_ETHER_PHY_ADDR
-# error "Please define CONFIG_SH_ETHER_PHY_ADDR"
+#ifndef CFG_SH_ETHER_PHY_ADDR
+# error "Please define CFG_SH_ETHER_PHY_ADDR"
 #endif
 
 #if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \
@@ -694,7 +694,7 @@ static int sh_ether_probe(struct udevice *udev)
        priv->bus = miiphy_get_dev_by_name(udev->name);
 
        eth->port = CONFIG_SH_ETHER_USE_PORT;
-       eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR;
+       eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR;
        eth->port_info[eth->port].iobase =
                (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port);
 

diff --git a/include/configs/alt.h b/include/configs/alt.h
index 2b783252734756d36fcf608c251184865768e8da..06ab5ce669b9255a40a48f31c1ea4d11576cd45e 100644 (file)
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -22,7 +22,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/condor.h b/include/configs/condor.h
index 3f99cbf9dab94649a459f5f914fa6034a1b345e2..43b88f1272134982967b502043d1748642856e9b 100644 (file)
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -15,7 +15,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/gose.h b/include/configs/gose.h
index 45a537341b0e0ba932fa82a65c6a3c9570013a31..5184db41061f19798a098829d6c2dc4ada0c8da0 100644 (file)
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -21,7 +21,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 3fde6140709417bcd01ea06252478921fa607a06..8ba9b73672c814a36b8a4a87b96da5986525784a 100644 (file)
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -18,7 +18,7 @@
 
 /* Network interface */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0
+#define CFG_SH_ETHER_PHY_ADDR  0
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index b3b6f03e08d437157c3318fd393c835ab9210716..2910336def6cd3b2e0b5def662d53ffca87c7ff1 100644 (file)
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -21,7 +21,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/lager.h b/include/configs/lager.h
index 16d15ccdd913e00c2a6cdcab79f27abbe46a5843..815239a73bd4c346a39f8df083aae43a2846bd1e 100644 (file)
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -22,7 +22,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/porter.h b/include/configs/porter.h
index f217141af8c06fa8b7f09c908bed0b388854aba7..f732aeb47b564db91a21fb16baff83a521b1d302 100644 (file)
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -23,7 +23,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/silk.h b/include/configs/silk.h
index 09c23d379e98618df304ddf9bfbc05bab49c4d3e..005eed154947e8baceeba372778aa697d8907820 100644 (file)
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -23,7 +23,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE

diff --git a/include/configs/stout.h b/include/configs/stout.h
index dd44b3e6d00a8ca0684181e00770640927fa6180..cf90e4d46457b1351f7587c57dfdf62431b64002 100644 (file)
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -27,7 +27,7 @@
 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
-#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CFG_SH_ETHER_PHY_ADDR  0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE