batch->bos_written =
rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(batch->exec_array_size));
- batch->cache.render = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
+ batch->bo_aux_modes = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
_mesa_key_pointer_equal);
batch->num_other_batches = 0;
u_trace_fini(&batch->trace);
- _mesa_hash_table_destroy(batch->cache.render, NULL);
+ _mesa_hash_table_destroy(batch->bo_aux_modes, NULL);
if (INTEL_DEBUG(DEBUG_ANY))
intel_batch_decode_ctx_finish(&batch->decoder);
struct iris_batch *other_batches[IRIS_BATCH_COUNT - 1];
unsigned num_other_batches;
- struct {
- /**
- * Set of struct brw_bo * that have been rendered to within this
- * batchbuffer and would need flushing before being used from another
- * cache domain that isn't coherent with it (i.e. the sampler).
- */
- struct hash_table *render;
- } cache;
+ /**
+ * Table containing struct iris_bo * that have been accessed within this
+ * batchbuffer and would need flushing before being used with a different
+ * aux mode.
+ */
+ struct hash_table *bo_aux_modes;
struct intel_batch_decode_ctx decoder;
struct hash_table_u64 *state_sizes;
}
}
-void
-iris_cache_flush_for_render(struct iris_batch *batch,
- struct iris_bo *bo,
- enum isl_aux_usage aux_usage)
+static void
+flush_previous_aux_mode(struct iris_batch *batch,
+ const struct iris_bo *bo,
+ enum isl_aux_usage aux_usage)
{
- iris_emit_buffer_barrier_for(batch, bo, IRIS_DOMAIN_RENDER_WRITE);
-
- /* Check to see if this bo has been used by a previous rendering operation
- * but with a different aux usage. If it has, flush the render cache so we
- * ensure that it's only in there with one aux usage at a time.
+ /* Check to see if this BO has been put into caches by a previous operation
+ * but with a different aux usage. If it has, flush those caches to ensure
+ * that it's only in there with one aux usage at a time.
*
* Even though it's not obvious, this could easily happen in practice.
* Suppose a client is blending on a surface with sRGB encode enabled on
*/
void *v_aux_usage = (void *) (uintptr_t) aux_usage;
struct hash_entry *entry =
- _mesa_hash_table_search_pre_hashed(batch->cache.render, bo->hash, bo);
+ _mesa_hash_table_search_pre_hashed(batch->bo_aux_modes, bo->hash, bo);
if (!entry) {
- _mesa_hash_table_insert_pre_hashed(batch->cache.render, bo->hash, bo,
+ _mesa_hash_table_insert_pre_hashed(batch->bo_aux_modes, bo->hash, bo,
v_aux_usage);
} else if (entry->data != v_aux_usage) {
iris_emit_pipe_control_flush(batch,
}
}
+void
+iris_cache_flush_for_render(struct iris_batch *batch,
+ struct iris_bo *bo,
+ enum isl_aux_usage aux_usage)
+{
+ iris_emit_buffer_barrier_for(batch, bo, IRIS_DOMAIN_RENDER_WRITE);
+ flush_previous_aux_mode(batch, bo, aux_usage);
+}
+
static void
flush_ubos(struct iris_batch *batch,
struct iris_shader_state *shs)
iris_resource_set_aux_state(ice, res, level, layer, 1, new_state);
}
}
+
+ flush_previous_aux_mode(batch, res->bo, aux_usage);
}
void