tty: serial: fsl_lpuart: set receive watermark for imx8qxp platform
authorSherry Sun <sherry.sun@nxp.com>
Mon, 30 Jan 2023 06:44:45 +0000 (14:44 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 31 Jan 2023 09:53:39 +0000 (10:53 +0100)
Since imx8qxp RX FIFO depth is 64 datawords, it will be better to set
the rx watermark as 31, which means when the number of datawords in the
receive FIFO(>= 32) is greater than the watermark, an interrupt or a DMA
request is generated.
Also keep the console rx watermark as 1 to make sure it responsive.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20230130064449.9564-3-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/fsl_lpuart.c

index e4aa161..868c278 100644 (file)
@@ -321,7 +321,7 @@ static struct lpuart_soc_data imx8qxp_data = {
        .devtype = IMX8QXP_LPUART,
        .iotype = UPIO_MEM32,
        .reg_off = IMX_REG_OFF,
-       .rx_watermark = 1,
+       .rx_watermark = 31,
 };
 static struct lpuart_soc_data imxrt1050_data = {
        .devtype = IMXRT1050_LPUART,
@@ -1527,6 +1527,8 @@ static void lpuart_setup_watermark(struct lpuart_port *sport)
                writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO);
        }
 
+       if (uart_console(&sport->port))
+               sport->rx_watermark = 1;
        writeb(0, sport->port.membase + UARTTWFIFO);
        writeb(sport->rx_watermark, sport->port.membase + UARTRWFIFO);
 
@@ -1563,6 +1565,8 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport)
        lpuart32_write(&sport->port, val, UARTFIFO);
 
        /* set the watermark */
+       if (uart_console(&sport->port))
+               sport->rx_watermark = 1;
        val = (sport->rx_watermark << UARTWATER_RXWATER_OFF) |
              (0x0 << UARTWATER_TXWATER_OFF);
        lpuart32_write(&sport->port, val, UARTWATER);