dts: starfive: Add overlay dts

Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index fc946b3..bbe3a96 100644 (file)
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
-subdir-y += evb-overlay
+subdir-y += evb-overlay vf2-overlay
 dtb-$(CONFIG_SOC_STARFIVE_JH7110) += jh7110-visionfive-v2.dtb  \
                                jh7110-evb.dtb                  \
                                jh7110-fpga.dtb                 \

diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
index fdfcaaf..d91ee09 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
@@ -646,6 +646,7 @@
        non-removable;
        cap-mmc-hw-reset;
        post-power-on-delay-ms = <200>;
+       vqmmc-supply = <&sdio_vdd>;
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins>;
        status = "okay";
@@ -659,6 +660,7 @@
        broken-cd;
        cap-sd-highspeed;
        post-power-on-delay-ms = <200>;
+       vqmmc-supply = <&sdio_vdd>;
        pinctrl-names = "default";
        pinctrl-0 = <&sdcard1_pins>;
        //cd-gpios = <&gpio 6 0>;

diff --git a/arch/riscv/boot/dts/starfive/vf2-overlay/Makefile b/arch/riscv/boot/dts/starfive/vf2-overlay/Makefile
new file mode 100644 (file)
index 0000000..21e425e
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/vf2-overlay/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_SOC_STARFIVE_JH7110) += vf2-overlay-uart3-i2c.dtbo

diff --git a/arch/riscv/boot/dts/starfive/vf2-overlay/vf2-overlay-uart3-i2c.dts b/arch/riscv/boot/dts/starfive/vf2-overlay/vf2-overlay-uart3-i2c.dts
new file mode 100644 (file)
index 0000000..90f44c8
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/vf2-overlay/vf2-overlay-uart3-i2c.dts
@@ -0,0 +1,78 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
+/ {
+       compatible = "starfive,visionfive-v2", "starfive,jh7110";
+
+       //gpio
+       fragment@0 {
+               target-path = "/soc/gpio@13040000";
+               __overlay__ {
+                       dt_uart3_pins: dt-uart3-pins {
+                               uart3-pins-tx {
+                                       sf,pins = <PAD_GPIO60>;
+                                       sf,pinmux = <PAD_GPIO60_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>;
+                                       sf,pin-gpio-dout = <GPO_UART3_SOUT>;
+                                       sf,pin-gpio-doen = <OEN_LOW>;
+                               };
+
+                               uart3-pins-rx {
+                                       sf,pins = <PAD_GPIO63>;
+                                       sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>;
+                                       sf,pin-gpio-doen = <OEN_HIGH>;
+                                       sf,pin-gpio-din =  <GPI_UART3_SIN>;
+                               };
+                       };
+
+                       dt_i2c1_pins: dt-i2c1-pins {
+                               i2c1-pins-scl {
+                                       sf,pins = <PAD_GPIO42>;
+                                       sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_LOW>;
+                                       sf,pin-gpio-doen = <OEN_I2C1_IC_CLK_OE>;
+                                       sf,pin-gpio-din =  <GPI_I2C1_IC_CLK_IN_A>;
+                               };
+
+                               i2c1-pins-sda {
+                                       sf,pins = <PAD_GPIO43>;
+                                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_LOW>;
+                                       sf,pin-gpio-doen = <OEN_I2C1_IC_DATA_OE>;
+                                       sf,pin-gpio-din =  <GPI_I2C1_IC_DATA_IN_A>;
+                               };
+                       };
+               };
+       };
+
+       //uart3
+       fragment@1 {
+               target-path = "/soc/serial@12000000";
+               __overlay__ {
+                       pinctrl-names = "default";
+               pinctrl-0 = <&dt_uart3_pins>;
+                       status = "okay";
+               };
+       };
+
+       //i2c1
+       fragment@2 {
+               target-path = "/soc/i2c@10040000";
+               __overlay__ {
+                       clock-frequency = <100000>;
+                       i2c-sda-hold-time-ns = <300>;
+                       i2c-sda-falling-time-ns = <3000>;
+                       i2c-scl-falling-time-ns = <3000>;
+                       auto_calc_scl_lhcnt;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&dt_i2c1_pins>;
+                       status = "okay";
+               };
+       };
+};
+
+ 

diff --git a/arch/riscv/configs/starfive_visionfive2_defconfig b/arch/riscv/configs/starfive_visionfive2_defconfig
index 79cde0b..b26a843 100644 (file)
--- a/arch/riscv/configs/starfive_visionfive2_defconfig
+++ b/arch/riscv/configs/starfive_visionfive2_defconfig
@@ -237,6 +237,7 @@ CONFIG_RPMSG_CHAR=y
 CONFIG_RPMSG_VIRTIO=y
 CONFIG_SIFIVE_L2_FLUSH_START=0x40000000
 CONFIG_SIFIVE_L2_FLUSH_SIZE=0x400000000
+CONFIG_STARFIVE_PMU=y
 CONFIG_PWM=y
 CONFIG_PWM_STARFIVE_PTC=y
 CONFIG_PHY_M31_DPHY_RX0=y