s390.md ("*la_64" + peepholes, [...]): Move to before adddi3 insn patterns.

	* config/s390/s390.md ("*la_64" + peepholes, "reload_indi"): Move
	to before adddi3 insn patterns.
	("*la_31" + peepholes, "*la_31_and", "*la_31_and_cc", "force_la_31",
	"reload_insi"): Move to before addsi3 insn patterns.

From-SVN: r77253

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a75edd9..e1934fa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-02-04  Ulrich Weigand  <uweigand@de.ibm.com>
+
+       * config/s390/s390.md ("*la_64" + peepholes, "reload_indi"): Move
+       to before adddi3 insn patterns.
+       ("*la_31" + peepholes, "*la_31_and", "*la_31_and_cc", "force_la_31",
+       "reload_insi"): Move to before addsi3 insn patterns.
+
 2004-02-04  Mark Mitchell  <mark@codesourcery.com>
 
        * calls.c (initialize_argument_information): Add CALL_FROM_THUNK_P

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 2ebee93..8cb2f25 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -1171,6 +1171,52 @@
   [(set (match_dup 0) (match_dup 2))]
   "operands[2] = get_pool_constant (operands[1]);")
 
+(define_insn "*la_64"
+  [(set (match_operand:DI 0 "register_operand" "=d,d")
+        (match_operand:QI 1 "address_operand" "U,W"))]
+  "TARGET_64BIT"
+  "@
+   la\t%0,%a1
+   lay\t%0,%a1"
+  [(set_attr "op_type" "RX,RXY")
+   (set_attr "type"    "la")])
+
+(define_peephole2
+  [(parallel
+    [(set (match_operand:DI 0 "register_operand" "")
+          (match_operand:QI 1 "address_operand" ""))
+     (clobber (reg:CC 33))])]
+  "TARGET_64BIT
+   && strict_memory_address_p (VOIDmode, operands[1])
+   && preferred_la_operand_p (operands[1])"
+  [(set (match_dup 0) (match_dup 1))]
+  "")
+
+(define_peephole2
+  [(set (match_operand:DI 0 "register_operand" "")
+        (match_operand:DI 1 "register_operand" ""))
+   (parallel
+    [(set (match_dup 0)
+          (plus:DI (match_dup 0)
+                   (match_operand:DI 2 "nonmemory_operand" "")))
+     (clobber (reg:CC 33))])]
+  "TARGET_64BIT
+   && !reg_overlap_mentioned_p (operands[0], operands[2])
+   && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (DImode, operands[1], operands[2]))
+   && preferred_la_operand_p (gen_rtx_PLUS (DImode, operands[1], operands[2]))"
+  [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))]
+  "")
+
+(define_expand "reload_indi"
+  [(parallel [(match_operand:DI 0 "register_operand" "=a")
+              (match_operand:DI 1 "s390_plus_operand" "")
+              (match_operand:DI 2 "register_operand" "=&a")])]
+  "TARGET_64BIT"
+{
+  s390_expand_plus_operand (operands[0], operands[1], operands[2]);
+  DONE;
+})
+
 ;
 ; movsi instruction pattern(s).
 ;
@@ -1267,6 +1313,88 @@
   [(set (match_dup 0) (match_dup 2))]
   "operands[2] = get_pool_constant (operands[1]);")
 
+(define_insn "*la_31"
+  [(set (match_operand:SI 0 "register_operand" "=d,d")
+        (match_operand:QI 1 "address_operand" "U,W"))]
+  "!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
+  "@
+   la\t%0,%a1
+   lay\t%0,%a1"
+  [(set_attr "op_type"  "RX,RXY")
+   (set_attr "type"     "la")])
+
+(define_peephole2
+  [(parallel
+    [(set (match_operand:SI 0 "register_operand" "")
+          (match_operand:QI 1 "address_operand" ""))
+     (clobber (reg:CC 33))])]
+  "!TARGET_64BIT
+   && strict_memory_address_p (VOIDmode, operands[1])
+   && preferred_la_operand_p (operands[1])"
+  [(set (match_dup 0) (match_dup 1))]
+  "")
+
+(define_peephole2
+  [(set (match_operand:SI 0 "register_operand" "")
+        (match_operand:SI 1 "register_operand" ""))
+   (parallel
+    [(set (match_dup 0)
+          (plus:SI (match_dup 0)
+                   (match_operand:SI 2 "nonmemory_operand" "")))
+     (clobber (reg:CC 33))])]
+  "!TARGET_64BIT
+   && !reg_overlap_mentioned_p (operands[0], operands[2])
+   && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (SImode, operands[1], operands[2]))
+   && preferred_la_operand_p (gen_rtx_PLUS (SImode, operands[1], operands[2]))"
+  [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))]
+  "")
+
+(define_insn "*la_31_and"
+  [(set (match_operand:SI 0 "register_operand" "=d,d")
+        (and:SI (match_operand:QI 1 "address_operand" "U,W")
+                (const_int 2147483647)))]
+  "!TARGET_64BIT"
+  "@
+   la\t%0,%a1
+   lay\t%0,%a1"
+  [(set_attr "op_type"  "RX,RXY")
+   (set_attr "type"     "la")])
+
+(define_insn_and_split "*la_31_and_cc"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+        (and:SI (match_operand:QI 1 "address_operand" "p")
+                (const_int 2147483647)))
+   (clobber (reg:CC 33))]
+  "!TARGET_64BIT"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 0)
+        (and:SI (match_dup 1) (const_int 2147483647)))]
+  ""
+  [(set_attr "op_type"  "RX")
+   (set_attr "type"     "la")])
+
+(define_insn "force_la_31"
+  [(set (match_operand:SI 0 "register_operand" "=d,d")
+        (match_operand:QI 1 "address_operand" "U,W"))
+   (use (const_int 0))]
+  "!TARGET_64BIT"
+  "@
+   la\t%0,%a1
+   lay\t%0,%a1"
+  [(set_attr "op_type"  "RX")
+   (set_attr "type"     "la")])
+
+(define_expand "reload_insi"
+  [(parallel [(match_operand:SI 0 "register_operand" "=a")
+              (match_operand:SI 1 "s390_plus_operand" "")
+              (match_operand:SI 2 "register_operand" "=&a")])]
+  "!TARGET_64BIT"
+{
+  s390_expand_plus_operand (operands[0], operands[1], operands[2]);
+  DONE;
+})
+
 ;
 ; movhi instruction pattern(s).
 ;
@@ -3403,53 +3531,6 @@
   ""
   "")
 
-(define_insn "*la_64"
-  [(set (match_operand:DI 0 "register_operand" "=d,d")
-        (match_operand:QI 1 "address_operand" "U,W"))]
-  "TARGET_64BIT"
-  "@
-   la\t%0,%a1
-   lay\t%0,%a1"
-  [(set_attr "op_type" "RX,RXY")
-   (set_attr "type"    "la")])
-
-(define_peephole2
-  [(parallel
-    [(set (match_operand:DI 0 "register_operand" "")
-          (match_operand:QI 1 "address_operand" ""))
-     (clobber (reg:CC 33))])]
-  "TARGET_64BIT
-   && strict_memory_address_p (VOIDmode, operands[1])
-   && preferred_la_operand_p (operands[1])"
-  [(set (match_dup 0) (match_dup 1))]
-  "")
-
-(define_peephole2
-  [(set (match_operand:DI 0 "register_operand" "")
-        (match_operand:DI 1 "register_operand" ""))
-   (parallel
-    [(set (match_dup 0)
-          (plus:DI (match_dup 0)
-                   (match_operand:DI 2 "nonmemory_operand" "")))
-     (clobber (reg:CC 33))])]
-  "TARGET_64BIT
-   && !reg_overlap_mentioned_p (operands[0], operands[2])
-   && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (DImode, operands[1], operands[2]))
-   && preferred_la_operand_p (gen_rtx_PLUS (DImode, operands[1], operands[2]))"
-  [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))]
-  "")
-
-(define_expand "reload_indi"
-  [(parallel [(match_operand:DI 0 "register_operand" "=a")
-              (match_operand:DI 1 "s390_plus_operand" "")
-              (match_operand:DI 2 "register_operand" "=&a")])]
-  "TARGET_64BIT"
-{
-  s390_expand_plus_operand (operands[0], operands[1], operands[2]);
-  DONE;
-})
-
-
 ;
 ; addsi3 instruction pattern(s).
 ;
@@ -3583,89 +3664,6 @@
    ay\t%0,%2"
   [(set_attr "op_type"  "RR,RI,RX,RXY")])
 
-(define_insn "*la_31"
-  [(set (match_operand:SI 0 "register_operand" "=d,d")
-        (match_operand:QI 1 "address_operand" "U,W"))]
-  "!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
-  "@
-   la\t%0,%a1
-   lay\t%0,%a1"
-  [(set_attr "op_type"  "RX,RXY")
-   (set_attr "type"     "la")])
-
-(define_peephole2
-  [(parallel
-    [(set (match_operand:SI 0 "register_operand" "")
-          (match_operand:QI 1 "address_operand" ""))
-     (clobber (reg:CC 33))])]
-  "!TARGET_64BIT
-   && strict_memory_address_p (VOIDmode, operands[1])
-   && preferred_la_operand_p (operands[1])"
-  [(set (match_dup 0) (match_dup 1))]
-  "")
-
-(define_peephole2
-  [(set (match_operand:SI 0 "register_operand" "")
-        (match_operand:SI 1 "register_operand" ""))
-   (parallel
-    [(set (match_dup 0)
-          (plus:SI (match_dup 0)
-                   (match_operand:SI 2 "nonmemory_operand" "")))
-     (clobber (reg:CC 33))])]
-  "!TARGET_64BIT
-   && !reg_overlap_mentioned_p (operands[0], operands[2])
-   && strict_memory_address_p (VOIDmode, gen_rtx_PLUS (SImode, operands[1], operands[2]))
-   && preferred_la_operand_p (gen_rtx_PLUS (SImode, operands[1], operands[2]))"
-  [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))]
-  "")
-
-(define_insn "*la_31_and"
-  [(set (match_operand:SI 0 "register_operand" "=d,d")
-        (and:SI (match_operand:QI 1 "address_operand" "U,W")
-                (const_int 2147483647)))]
-  "!TARGET_64BIT"
-  "@
-   la\t%0,%a1
-   lay\t%0,%a1"
-  [(set_attr "op_type"  "RX,RXY")
-   (set_attr "type"     "la")])
-
-(define_insn_and_split "*la_31_and_cc"
-  [(set (match_operand:SI 0 "register_operand" "=d")
-        (and:SI (match_operand:QI 1 "address_operand" "p")
-                (const_int 2147483647)))
-   (clobber (reg:CC 33))]
-  "!TARGET_64BIT"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 0)
-        (and:SI (match_dup 1) (const_int 2147483647)))]
-  ""
-  [(set_attr "op_type"  "RX")
-   (set_attr "type"     "la")])
-
-(define_insn "force_la_31"
-  [(set (match_operand:SI 0 "register_operand" "=d,d")
-        (match_operand:QI 1 "address_operand" "U,W"))
-   (use (const_int 0))]
-  "!TARGET_64BIT"
-  "@
-   la\t%0,%a1
-   lay\t%0,%a1"
-  [(set_attr "op_type"  "RX")
-   (set_attr "type"     "la")])
-
-(define_expand "reload_insi"
-  [(parallel [(match_operand:SI 0 "register_operand" "=a")
-              (match_operand:SI 1 "s390_plus_operand" "")
-              (match_operand:SI 2 "register_operand" "=&a")])]
-  "!TARGET_64BIT"
-{
-  s390_expand_plus_operand (operands[0], operands[1], operands[2]);
-  DONE;
-})
-
-
 ;
 ; adddf3 instruction pattern(s).
 ;