#include <asm/io.h>
#define DRV_NAME "ahci"
-#define DRV_VERSION "1.01"
+#define DRV_VERSION "1.2"
enum {
#include <linux/libata.h>
#define DRV_NAME "ata_piix"
-#define DRV_VERSION "1.04"
+#define DRV_VERSION "1.05"
enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
#define __LIBATA_H__
#define DRV_NAME "libata"
-#define DRV_VERSION "1.12" /* must be exactly four chars */
+#define DRV_VERSION "1.20" /* must be exactly four chars */
struct ata_scsi_args {
u16 *id;
#include "sata_promise.h"
#define DRV_NAME "sata_promise"
-#define DRV_VERSION "1.02"
+#define DRV_VERSION "1.03"
enum {
#include <linux/libata.h>
#define DRV_NAME "sata_qstor"
-#define DRV_VERSION "0.04"
+#define DRV_VERSION "0.05"
enum {
QS_PORTS = 4,
#endif /* CONFIG_PPC_OF */
#define DRV_NAME "sata_svw"
-#define DRV_VERSION "1.06"
+#define DRV_VERSION "1.07"
/* Taskfile registers offsets */
#define K2_SATA_TF_CMD_OFFSET 0x00
#include "sata_promise.h"
#define DRV_NAME "sata_sx4"
-#define DRV_VERSION "0.7"
+#define DRV_VERSION "0.8"
enum {
#include <linux/libata.h>
#define DRV_NAME "sata_vsc"
-#define DRV_VERSION "1.0"
+#define DRV_VERSION "1.1"
/* Interrupt register offsets (from chip base address) */
#define VSC_SATA_INT_STAT_OFFSET 0x00