CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_QSPI=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_QSPI=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQ_QSPI=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_QSPI=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_PHYLIB=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ZYNQ=y
config ZYNQ_GEM
depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP)
+ select PHYLIB
bool "Xilinx Ethernet GEM"
help
This MAC is present in Xilinx Zynq and ZynqMP SoCs.
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_PHYLIB)
-# error XILINX_GEM_ETHERNET requires PHYLIB
-#endif
-
/* Bit/mask specification */
#define ZYNQ_GEM_PHYMNTNC_OP_MASK 0x40020000 /* operation mask bits */
#define ZYNQ_GEM_PHYMNTNC_OP_R_MASK 0x20000000 /* read operation */
# define CONFIG_NET_MULTI
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-# define CONFIG_PHYLIB
# define CONFIG_PHY_MARVELL
# define CONFIG_PHY_TI
#endif