let isCommutable = 1;
}
+// Generic bitwise and.
+def G_AND : Instruction {
+ let OutOperandList = (outs unknown:$dst);
+ let InOperandList = (ins unknown:$src1, unknown:$src2);
+ let hasSideEffects = 0;
+ let isCommutable = 1;
+}
+
// Generic bitwise or.
def G_OR : Instruction {
let OutOperandList = (outs unknown:$dst);
HANDLE_TARGET_OPCODE(G_ADD)
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_START, G_ADD)
+/// Generic Bitwise-AND instruction.
+HANDLE_TARGET_OPCODE(G_AND)
+
/// Generic Bitwise-OR instruction.
HANDLE_TARGET_OPCODE(G_OR)
switch(Inst.getOpcode()) {
case Instruction::Add:
return translateBinaryOp(TargetOpcode::G_ADD, Inst);
+ case Instruction::And:
+ return translateBinaryOp(TargetOpcode::G_AND, Inst);
case Instruction::Or:
return translateBinaryOp(TargetOpcode::G_OR, Inst);
case Instruction::Br:
%res = or i32 %arg1, %arg2
ret i32 %res
}
+
+; Tests for and.
+; CHECK: name: andi64
+; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
+; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1
+; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_AND s64 [[ARG1]], [[ARG2]]
+; CHECK-NEXT: %x0 = COPY [[RES]]
+; CHECK-NEXT: RET_ReallyLR implicit %x0
+define i64 @andi64(i64 %arg1, i64 %arg2) {
+ %res = and i64 %arg1, %arg2
+ ret i64 %res
+}
+
+; CHECK: name: andi32
+; CHECK: [[ARG1:%[0-9]+]](32) = COPY %w0
+; CHECK-NEXT: [[ARG2:%[0-9]+]](32) = COPY %w1
+; CHECK-NEXT: [[RES:%[0-9]+]](32) = G_AND s32 [[ARG1]], [[ARG2]]
+; CHECK-NEXT: %w0 = COPY [[RES]]
+; CHECK-NEXT: RET_ReallyLR implicit %w0
+define i32 @andi32(i32 %arg1, i32 %arg2) {
+ %res = and i32 %arg1, %arg2
+ ret i32 %res
+}