arm64: zynqmp: Describe bus-width for SD card on KV260

SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b4046d2f593047400c190e438fd9d05128c293d9.1683034376.git.michal.simek@amd.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
index 5bd2e8c..bd7628a 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
@@ -135,6 +135,7 @@
        disable-wp;
        xlnx,mio-bank = <1>;
        assigned-clock-rates = <187498123>;
+       bus-width = <4>;
 };
 
 &gem3 { /* required by spec */

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
index 83757fe..8e66448 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
@@ -118,6 +118,7 @@
        clk-phase-uhs-sdr25 = <120>, <60>;
        clk-phase-uhs-ddr50 = <126>, <48>;
        assigned-clock-rates = <187498123>;
+       bus-width = <4>;
 };
 
 &gem3 { /* required by spec */