We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid
access errors like
CACHE: Misaligned operation at range [
be0231e0,
be0235e0]
seen on the MCIMX7SABRE.
Fixes:
d5aee659f217 ("fs: ext4: cache extent data")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
if (cache->buf && cache->block == block && cache->size == size)
return 1;
ext_cache_fini(cache);
- cache->buf = malloc(size);
+ cache->buf = memalign(ARCH_DMA_MINALIGN, size);
if (!cache->buf)
return 0;
if (!ext4fs_devread(block, 0, size, cache->buf)) {