#include <linux/io.h>
#include <asm/unaligned.h>
+#include <linux/pci.h>
#include "ath9k.h"
#include "initvals.h"
timer->trigger(timer->arg);
}
}
+
+/*
+ * Primitive to disable ASPM
+ */
+void ath_pcie_aspm_disable(struct ath_softc *sc)
+{
+ struct pci_dev *pdev = to_pci_dev(sc->dev);
+ u8 aspm;
+
+ pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm);
+ aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1);
+ pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
+}
void ath_gen_timer_isr(struct ath_hw *hw);
u32 ath9k_hw_gettsf32(struct ath_hw *ah);
+#define ATH_PCIE_CAP_LINK_CTRL 0x70
+#define ATH_PCIE_CAP_LINK_L0S 1
+#define ATH_PCIE_CAP_LINK_L1 2
+
+void ath_pcie_aspm_disable(struct ath_softc *sc);
#endif
AR_STOMP_LOW_WLAN_WGHT);
ath9k_hw_btcoex_enable(sc->sc_ah);
+ ath_pcie_aspm_disable(sc);
if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
ath_btcoex_timer_resume(sc, &sc->btcoex_info);
}