// Identity and pointer-to-pointer casts are free.
return 0;
break;
- case Instruction::Trunc:
+ case Instruction::Trunc: {
// trunc to a native type is free (assuming the target has compare and
// shift-right of the same width).
- if (DL.isLegalInteger(DL.getTypeSizeInBits(Dst)))
+ TypeSize DstSize = DL.getTypeSizeInBits(Dst);
+ if (!DstSize.isScalable() && DL.isLegalInteger(DstSize.getFixedSize()))
return 0;
break;
}
+ }
return 1;
}
--- /dev/null
+; RUN: opt -mtriple=aarch64-linux-gnu -mattr=+sve -cost-model -analyze < %s 2>%t | FileCheck %s
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
+; WARN-NOT: warning
+
+; CHECK: Found an estimated cost of 0 for instruction: %0 = trunc <vscale x 2 x i64> %v to <vscale x 2 x i32>
+
+define void @trunc_nxv2i64_to_nxv2i32(<vscale x 2 x i32>* %ptr, <vscale x 2 x i64> %v) {
+entry:
+ %0 = trunc <vscale x 2 x i64> %v to <vscale x 2 x i32>
+ store <vscale x 2 x i32> %0, <vscale x 2 x i32>* %ptr
+ ret void
+}
--- /dev/null
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -mtriple aarch64-linux-gnu -mattr=+sve -instcombine -S < %s 2>%t | FileCheck %s
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
+; WARN-NOT: warning
+
+define void @trunc_nxv2i64_to_nxv2i32(i32* %ptr, <vscale x 4 x i32> %v) {
+; CHECK-LABEL: @trunc_nxv2i64_to_nxv2i32(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[V:%.*]] to <vscale x 2 x i64>
+; CHECK-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[TMP0]])
+; CHECK-NEXT: [[TMP3:%.*]] = trunc <vscale x 2 x i64> [[TMP1]] to <vscale x 2 x i32>
+; CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32> [[TMP3]], <vscale x 2 x i1> [[TMP2]], i32* [[PTR:%.*]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %0 = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)
+ %1 = bitcast <vscale x 4 x i32> %v to <vscale x 2 x i64>
+ %2 = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %0)
+ %3 = trunc <vscale x 2 x i64> %1 to <vscale x 2 x i32>
+ call void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32> %3, <vscale x 2 x i1> %2, i32* %ptr)
+ ret void
+}
+
+declare void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, i32*)
+declare <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1>)
+declare <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 %pattern)