ARM: dts: rockchip: Fix the timer clocks order
authorEzequiel Garcia <ezequiel@collabora.com>
Thu, 6 May 2021 11:11:35 +0000 (08:11 -0300)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 9 May 2021 23:57:14 +0000 (01:57 +0200)
Fixed order is the device-tree convention.
The timer driver currently gets clocks by name,
so no changes are needed there.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Link: https://lore.kernel.org/r/20210506111136.3941-3-ezequiel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3188.dtsi
arch/arm/boot/dts/rk3288.dtsi

index 2298a8d..2c08ae6 100644 (file)
                compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
                reg = <0x2000e000 0x20>;
                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>;
-               clock-names = "timer", "pclk";
+               clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>;
+               clock-names = "pclk", "timer";
        };
 
        timer6: timer@200380a0 {
                compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
                reg = <0x200380a0 0x20>;
                interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>;
-               clock-names = "timer", "pclk";
+               clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>;
+               clock-names = "pclk", "timer";
        };
 
        i2s0: i2s@1011a000 {
index 24b9032..1e6594f 100644 (file)
                compatible = "rockchip,rk3288-timer";
                reg = <0x0 0xff810000 0x0 0x20>;
                interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&xin24m>, <&cru PCLK_TIMER>;
-               clock-names = "timer", "pclk";
+               clocks = <&cru PCLK_TIMER>, <&xin24m>;
+               clock-names = "pclk", "timer";
        };
 
        display-subsystem {