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x86: turn off cache: set control register properly
author
Ondrej Kupka
<ondra.cap@gmail.com>
Fri, 30 Sep 2011 10:05:11 +0000
(21:05 +1100)
committer
Graeme Russ
<graeme.russ@gmail.com>
Wed, 2 Nov 2011 09:48:30 +0000
(20:48 +1100)
Bits should be ORed when they are supposed to be added together
Signed-off-by: Ondrej Kupka <ondra.cap@gmail.com>
arch/x86/cpu/start16.S
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diff --git
a/arch/x86/cpu/start16.S
b/arch/x86/cpu/start16.S
index
3d3017a
..
9dabff2
100644
(file)
--- a/
arch/x86/cpu/start16.S
+++ b/
arch/x86/cpu/start16.S
@@
-50,7
+50,7
@@
board_init16_ret:
/* Turn of cache (this might require a 486-class CPU) */
movl %cr0, %eax
- orl $(X86_CR0_NW
&
X86_CR0_CD), %eax
+ orl $(X86_CR0_NW
|
X86_CR0_CD), %eax
movl %eax, %cr0
wbinvd