ARM: tegra: apalis_t30: get rid of fake clocks simple bus

Get rid of the fake clocks simple bus and use node names as per the
actual schematics.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 6d6f174..d80101d 100644 (file)
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -1097,25 +1097,16 @@
                mmc-ddr-1_8v;
        };
 
-       clocks {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               clk32k_in: clk@0 {
-                       compatible = "fixed-clock";
-                       reg = <0>;
-                       #clock-cells = <0>;
-                       clock-frequency = <32768>;
-               };
+       clk32k_in: xtal1 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <32768>;
+       };
 
-               clk16m: clk@1 {
-                       compatible = "fixed-clock";
-                       reg = <1>;
-                       #clock-cells = <0>;
-                       clock-frequency = <16000000>;
-                       clock-output-names = "clk16m";
-               };
+       clk16m: osc4 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <16000000>;
        };
 
        reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {