Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
authorLinus Torvalds <torvalds@linux-foundation.org>
Thu, 23 Apr 2020 16:36:40 +0000 (09:36 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Thu, 23 Apr 2020 16:36:40 +0000 (09:36 -0700)
Pull ARM SoC fixes from Arnd Bergmann:
 "A few smaller fixes for v5.7-rc3: The majority are fixes for bugs I
  found after restarting my randconfig build testing that had been
  dormant for a while.

  On the Nokia N950/N9 phone, a DT fix is required to address a boot
  regression.

  For the bcm283x (Raspberry Pi), two DT fixes address minor issues"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  soc: imx8: select SOC_BUS
  soc: tegra: fix tegra_pmc_get_suspend_mode definition
  soc: fsl: dpio: avoid stack usage warning
  soc: fsl: dpio: fix incorrect pointer conversions
  ARM: imx: provide v7_cpu_resume() only on ARM_CPU_SUSPEND=y
  ARM: dts: bcm283x: Disable dsi0 node
  firmware: xilinx: make firmware_debugfs_root static
  drivers: soc: xilinx: fix firmware driver Kconfig dependency
  ARM: dts: bcm283x: Add cells encoding format to firmware bus
  ARM: dts: OMAP3: disable RNG on N950/N9

arch/arm/boot/dts/bcm2835-rpi.dtsi
arch/arm/boot/dts/bcm283x.dtsi
arch/arm/boot/dts/omap3-n950-n9.dtsi
arch/arm/mach-imx/Makefile
drivers/firmware/xilinx/zynqmp-debug.c
drivers/soc/fsl/dpio/dpio-service.c
drivers/soc/fsl/dpio/qbman-portal.c
drivers/soc/imx/Kconfig
drivers/soc/xilinx/Kconfig
include/soc/tegra/pmc.h

index fd2c766..f7ae5a4 100644 (file)
@@ -14,6 +14,9 @@
        soc {
                firmware: firmware {
                        compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
                        mboxes = <&mailbox>;
                        dma-ranges;
                };
index e1abe8c..b83a864 100644 (file)
                                             "dsi0_ddr2",
                                             "dsi0_ddr";
 
+                       status = "disabled";
                };
 
                aux: aux@7e215000 {
index a075b63..11d41e8 100644 (file)
        status = "disabled";
 };
 
+/* RNG not directly accessible on N950/N9. */
+&rng_target {
+       status = "disabled";
+};
+
 &usb_otg_hs {
        interface-type = <0>;
        usb-phy = <&usb2_phy>;
index 03506ce..e7364e6 100644 (file)
@@ -91,8 +91,10 @@ AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
 obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
 endif
+ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
 AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
+endif
 obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
 
 obj-$(CONFIG_SOC_IMX1) += mach-imx1.o
index c6d0724..43bc6cf 100644 (file)
@@ -35,7 +35,7 @@ static struct pm_api_info pm_api_list[] = {
        PM_API(PM_QUERY_DATA),
 };
 
-struct dentry *firmware_debugfs_root;
+static struct dentry *firmware_debugfs_root;
 
 /**
  * zynqmp_pm_argument_value() - Extract argument value from a PM-API request
index cd4f641..bcdcd3e 100644 (file)
@@ -478,12 +478,18 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d,
                                const struct dpaa2_fd *fd,
                                int nb)
 {
-       int i;
-       struct qbman_eq_desc ed[32];
+       struct qbman_eq_desc *ed;
+       int i, ret;
+
+       ed = kcalloc(sizeof(struct qbman_eq_desc), 32, GFP_KERNEL);
+       if (!ed)
+               return -ENOMEM;
 
        d = service_select(d);
-       if (!d)
-               return -ENODEV;
+       if (!d) {
+               ret = -ENODEV;
+               goto out;
+       }
 
        for (i = 0; i < nb; i++) {
                qbman_eq_desc_clear(&ed[i]);
@@ -491,7 +497,10 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d,
                qbman_eq_desc_set_fq(&ed[i], fqid[i]);
        }
 
-       return qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
+       ret = qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
+out:
+       kfree(ed);
+       return ret;
 }
 EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_desc_fq);
 
index d1f49ca..804b8ba 100644 (file)
@@ -753,7 +753,7 @@ int qbman_swp_enqueue_multiple_mem_back(struct qbman_swp *s,
        if (!s->eqcr.available) {
                eqcr_ci = s->eqcr.ci;
                p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
-               s->eqcr.ci = __raw_readl(p) & full_mask;
+               s->eqcr.ci = *p & full_mask;
                s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
                                        eqcr_ci, s->eqcr.ci);
                if (!s->eqcr.available) {
@@ -823,7 +823,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s,
        const uint32_t *cl;
        uint32_t eqcr_ci, eqcr_pi, half_mask, full_mask;
        int i, num_enqueued = 0;
-       uint64_t addr_cena;
 
        half_mask = (s->eqcr.pi_ci_mask>>1);
        full_mask = s->eqcr.pi_ci_mask;
@@ -867,7 +866,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s,
 
        /* Flush all the cacheline without load/store in between */
        eqcr_pi = s->eqcr.pi;
-       addr_cena = (uint64_t)s->addr_cena;
        for (i = 0; i < num_enqueued; i++)
                eqcr_pi++;
        s->eqcr.pi = eqcr_pi & full_mask;
@@ -901,7 +899,7 @@ int qbman_swp_enqueue_multiple_desc_mem_back(struct qbman_swp *s,
        if (!s->eqcr.available) {
                eqcr_ci = s->eqcr.ci;
                p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
-               s->eqcr.ci = __raw_readl(p) & full_mask;
+               s->eqcr.ci = *p & full_mask;
                s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
                                        eqcr_ci, s->eqcr.ci);
                if (!s->eqcr.available)
index 67aa94b..d515d2c 100644 (file)
@@ -21,6 +21,7 @@ config SOC_IMX8M
        bool "i.MX8M SoC family support"
        depends on ARCH_MXC || COMPILE_TEST
        default ARCH_MXC && ARM64
+       select SOC_BUS
        help
          If you say yes here you get support for the NXP i.MX8M family
          support, it will provide the SoC info like SoC family,
index 223f1f9..646512d 100644 (file)
@@ -19,7 +19,7 @@ config XILINX_VCU
 
 config ZYNQMP_POWER
        bool "Enable Xilinx Zynq MPSoC Power Management driver"
-       depends on PM && ARCH_ZYNQMP
+       depends on PM && ZYNQMP_FIRMWARE
        default y
        select MAILBOX
        select ZYNQMP_IPI_MBOX
@@ -35,7 +35,7 @@ config ZYNQMP_POWER
 config ZYNQMP_PM_DOMAINS
        bool "Enable Zynq MPSoC generic PM domains"
        default y
-       depends on PM && ARCH_ZYNQMP && ZYNQMP_FIRMWARE
+       depends on PM && ZYNQMP_FIRMWARE
        select PM_GENERIC_DOMAINS
        help
          Say yes to enable device power management through PM domains
index 0dd52b0..361cb64 100644 (file)
@@ -168,7 +168,6 @@ int tegra_io_pad_power_disable(enum tegra_io_pad id);
 int tegra_io_rail_power_on(unsigned int id);
 int tegra_io_rail_power_off(unsigned int id);
 
-enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void);
 void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode);
 void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode);
 
@@ -220,11 +219,6 @@ static inline int tegra_io_rail_power_off(unsigned int id)
        return -ENOSYS;
 }
 
-static inline enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
-{
-       return TEGRA_SUSPEND_NONE;
-}
-
 static inline void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode)
 {
 }
@@ -235,4 +229,13 @@ static inline void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode)
 
 #endif /* CONFIG_SOC_TEGRA_PMC */
 
+#if defined(CONFIG_SOC_TEGRA_PMC) && defined(CONFIG_PM_SLEEP)
+enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void);
+#else
+static inline enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
+{
+       return TEGRA_SUSPEND_NONE;
+}
+#endif
+
 #endif /* __SOC_TEGRA_PMC_H__ */