arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodes
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Tue, 22 Mar 2022 09:55:11 +0000 (10:55 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 13 Apr 2022 11:43:04 +0000 (13:43 +0200)
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
arch/arm64/boot/dts/renesas/r8a774c0.dtsi

index 1284612..faf5bbb 100644 (file)
                        compatible = "renesas,r8a774a1-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
index a4b406a..be998bc 100644 (file)
                        compatible = "renesas,r8a774b1-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
index e123c8d..4f69f90 100644 (file)
                        compatible = "renesas,r8a774c0-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;