MIPS: BCM63xx: Enable second core SMP on BCM6328 if available

BCM6328 has a OTP which tells us if the second core is available.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/5490/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index 3b21454..8ac4e09 100644 (file)
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -69,7 +69,11 @@ void __init prom_init(void)
                 * for now.
                 */
                if (BCMCPU_IS_6328()) {
-                       bmips_smp_enabled = 0;
+                       reg = bcm_readl(BCM_6328_OTP_BASE +
+                                       OTP_USER_BITS_6328_REG(3));
+
+                       if (reg & OTP_6328_REG3_TP1_DISABLED)
+                               bmips_smp_enabled = 0;
                } else if (BCMCPU_IS_6358()) {
                        bmips_smp_enabled = 0;
                }

diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
index 9d3c08e..22390a2 100644 (file)
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -296,6 +296,8 @@ enum bcm63xx_regs_set {
 #define BCM_6328_PCMDMAS_BASE          (0xdeadbeef)
 #define BCM_6328_RNG_BASE              (0xdeadbeef)
 #define BCM_6328_MISC_BASE             (0xb0001800)
+#define BCM_6328_OTP_BASE              (0xb0000600)
+
 /*
  * 6338 register sets base address
  */

diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 6542137..018628f 100644 (file)
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -1477,4 +1477,11 @@
 
 #define PCIE_DEVICE_OFFSET             0x8000
 
+/*************************************************************************
+ * _REG relative to RSET_OTP
+ *************************************************************************/
+
+#define OTP_USER_BITS_6328_REG(i)      (0x20 + (i) * 4)
+#define   OTP_6328_REG3_TP1_DISABLED   BIT(9)
+
 #endif /* BCM63XX_REGS_H_ */