mips: octeon: dts: Add I2C DT nodes
authorStefan Roese <sr@denx.de>
Thu, 30 Jul 2020 11:56:15 +0000 (13:56 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Mon, 3 Aug 2020 19:11:41 +0000 (21:11 +0200)
Add I2C DT nodes to the Octeon dts / dtsi files.

Signed-off-by: Stefan Roese <sr@denx.de>
arch/mips/dts/mrvl,cn73xx.dtsi
arch/mips/dts/mrvl,octeon-ebb7304.dts

index 8d32a49..4c7b6e4 100644 (file)
                        reg-shift = <3>;
                        interrupts = <0x08040 4>;
                };
+
+               i2c0: i2c@1180000001000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "cavium,octeon-7890-twsi";
+                       reg = <0x11800 0x00001000 0x0 0x200>;
+                       /* INT_ST, INT_TS, INT_CORE */
+                       interrupts = <0x0b000 1>, <0x0b001 1>, <0x0b002 1>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c1: i2c@1180000001200 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "cavium,octeon-7890-twsi";
+                       reg = <0x11800 0x00001200 0x0 0x200>;
+                       /* INT_ST, INT_TS, INT_CORE */
+                       interrupts = <0x0b100 1>, <0x0b101 1>, <0x0b102 1>;
+                       clock-frequency = <100000>;
+               };
        };
 };
index 4e9c2de..096e5c8 100644 (file)
 &uart0 {
        clock-frequency = <1200000000>;
 };
+
+&i2c0 {
+       u-boot,dm-pre-reloc;    /* Needed early for DDR SPD EEPROM */
+       clock-frequency = <100000>;
+};
+
+&i2c1 {
+       u-boot,dm-pre-reloc;    /* Needed early for DDR SPD EEPROM */
+       clock-frequency = <100000>;
+};