nand_chip->IO_ADDR_R = host->io_base;
nand_chip->IO_ADDR_W = host->io_base;
nand_chip->cmd_ctrl = at91_nand_cmd_ctrl;
- nand_chip->dev_ready = at91_nand_device_ready;
+
+ if (host->board->rdy_pin)
+ nand_chip->dev_ready = at91_nand_device_ready;
+
nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
nand_chip->chip_delay = 20; /* 20us command delay time */
/*
* hardware specific access to control-lines
*
- * NAND_NCE: bit 0 -> bit 7
+ * NAND_NCE: bit 0 -> bit 6 (bit 7 = 1)
* NAND_CLE: bit 1 -> bit 4
* NAND_ALE: bit 2 -> bit 5
*/
struct nand_chip *chip = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) {
- unsigned char bits;
+ unsigned char bits = 0x80;
- bits = (ctrl & (NAND_CLE | NAND_ALE)) << 3;
- bits = (ctrl & NAND_NCE) << 7;
+ bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3;
+ bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40;
- clps_writeb((clps_readb(ep7312_pxdr) & 0xB0) | 0x10,
+ clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits,
ep7312_pxdr);
}
if (cmd != NAND_CMD_NONE)
* if we have HW ecc support.
* The AG-AND chips have nice features for speed improvement,
* which are not supported yet. Read / program 4 pages in one go.
+ * BBT table is not serialized, has to be fixed
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
/* We write two bytes, so we dont have to mess with 16 bit
* access
*/
+ nand_get_device(chip, mtd, FL_WRITING);
ofs += mtd->oobsize;
chip->ops.len = chip->ops.ooblen = 2;
chip->ops.datbuf = NULL;
chip->ops.ooboffs = chip->badblockpos & ~0x01;
ret = nand_do_write_oob(mtd, ofs, &chip->ops);
+ nand_release_device(mtd);
}
if (!ret)
mtd->ecc_stats.badblocks++;
+
return ret;
}
uint8_t *p = buf;
uint8_t *ecc_calc = chip->buffers->ecccalc;
uint8_t *ecc_code = chip->buffers->ecccode;
- int *eccpos = chip->ecc.layout->eccpos;
+ uint32_t *eccpos = chip->ecc.layout->eccpos;
chip->ecc.read_page_raw(mtd, chip, buf);
uint8_t *p = buf;
uint8_t *ecc_calc = chip->buffers->ecccalc;
uint8_t *ecc_code = chip->buffers->ecccode;
- int *eccpos = chip->ecc.layout->eccpos;
+ uint32_t *eccpos = chip->ecc.layout->eccpos;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
chip->ecc.hwctl(mtd, NAND_ECC_READ);
int eccsteps = chip->ecc.steps;
uint8_t *ecc_calc = chip->buffers->ecccalc;
const uint8_t *p = buf;
- int *eccpos = chip->ecc.layout->eccpos;
+ uint32_t *eccpos = chip->ecc.layout->eccpos;
/* Software ecc calculation */
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
int eccsteps = chip->ecc.steps;
uint8_t *ecc_calc = chip->buffers->ecccalc;
const uint8_t *p = buf;
- int *eccpos = chip->ecc.layout->eccpos;
+ uint32_t *eccpos = chip->ecc.layout->eccpos;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
else {
if (!mtd->erasesize) {
printk(KERN_WARNING PREFIX "please provide block_size");
+ kfree(part);
return;
}
else
set_freezable();
for (;;) {
allow_signal(SIGHUP);
-
+ again:
if (!jffs2_thread_should_wake(c)) {
set_current_state (TASK_INTERRUPTIBLE);
D1(printk(KERN_DEBUG "jffs2_garbage_collect_thread sleeping...\n"));
schedule();
}
- if (try_to_freeze())
- continue;
-
/* This thread is purely an optimisation. But if it runs when
other things could be running, it actually makes things a
lot worse. Use yield() and put it at the back of the runqueue
siginfo_t info;
unsigned long signr;
+ if (try_to_freeze())
+ goto again;
+
signr = dequeue_signal_lock(current, ¤t->blocked, &info);
switch(signr) {
#define ref_obsolete(ref) (((ref)->flash_offset & 3) == REF_OBSOLETE)
#define mark_ref_normal(ref) do { (ref)->flash_offset = ref_offset(ref) | REF_NORMAL; } while(0)
+/* Dirent nodes should be REF_PRISTINE only if they are not a deletion
+ dirent. Deletion dirents should be REF_NORMAL so that GC gets to
+ throw them away when appropriate */
+#define dirent_node_state(rd) ( (je32_to_cpu((rd)->ino)?REF_PRISTINE:REF_NORMAL) )
+
/* NB: REF_PRISTINE for an inode-less node (ref->next_in_ino == NULL) indicates
it is an unknown node of type JFFS2_NODETYPE_RWCOMPAT_COPY, so it'll get
copied. If you need to do anything different to GC inode-less nodes, then
if (crc != tn->data_crc) {
JFFS2_NOTICE("wrong data CRC in data node at 0x%08x: read %#08x, calculated %#08x.\n",
- ofs, tn->data_crc, crc);
+ ref_offset(ref), tn->data_crc, crc);
return 1;
}
jeb->unchecked_size -= len;
c->used_size += len;
c->unchecked_size -= len;
- ref->flash_offset = ref_offset(ref) | REF_PRISTINE;
+ ref->flash_offset = ref_offset(ref) | dirent_node_state(rd);
spin_unlock(&c->erase_completion_lock);
}
return -ENOMEM;
}
- fd->raw = jffs2_link_node_ref(c, jeb, ofs | REF_PRISTINE, PAD(je32_to_cpu(rd->totlen)), ic);
+ fd->raw = jffs2_link_node_ref(c, jeb, ofs | dirent_node_state(rd),
+ PAD(je32_to_cpu(rd->totlen)), ic);
fd->next = NULL;
fd->version = je32_to_cpu(rd->version);
flash_ofs |= REF_NORMAL;
}
fn->raw = jffs2_add_physical_node_ref(c, flash_ofs, PAD(sizeof(*ri)+datalen), f->inocache);
+ if (IS_ERR(fn->raw)) {
+ void *hold_err = fn->raw;
+ /* Release the full_dnode which is now useless, and return */
+ jffs2_free_full_dnode(fn);
+ return ERR_PTR(PTR_ERR(hold_err));
+ }
fn->ofs = je32_to_cpu(ri->offset);
fn->size = je32_to_cpu(ri->dsize);
fn->frags = 0;
return ERR_PTR(ret?ret:-EIO);
}
/* Mark the space used */
- fd->raw = jffs2_add_physical_node_ref(c, flash_ofs | REF_PRISTINE, PAD(sizeof(*rd)+namelen), f->inocache);
+ fd->raw = jffs2_add_physical_node_ref(c, flash_ofs | dirent_node_state(rd),
+ PAD(sizeof(*rd)+namelen), f->inocache);
+ if (IS_ERR(fd->raw)) {
+ void *hold_err = fd->raw;
+ /* Release the full_dirent which is now useless, and return */
+ jffs2_free_full_dirent(fd);
+ return ERR_PTR(PTR_ERR(hold_err));
+ }
if (retried) {
jffs2_dbg_acct_sanity_check(c,NULL);