drm/amdgpu: Make UTCL2 snoop CPU caches
authorRajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tue, 20 Dec 2022 20:37:57 +0000 (15:37 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:50:59 +0000 (09:50 -0400)
On AMD APP APUs, to make UTCL2 snoop CPU caches, its not sufficient to
rely on xgmi connected flag so add the logic to use is_app_apu to
program the PDE_REQUEST_PHYSICAL bit correctly for gfxhub and mmhub
both.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

index 8ba59ff..8901e73 100644 (file)
@@ -252,7 +252,8 @@ static void gfxhub_v1_2_xcc_init_cache_regs(struct amdgpu_device *adev,
                WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL3, tmp);
 
                tmp = regVM_L2_CNTL4_DEFAULT;
-               if (adev->gmc.xgmi.connected_to_cpu) {
+               /* For AMD APP APUs setup WC memory */
+               if (adev->gmc.xgmi.connected_to_cpu || adev->gmc.is_app_apu) {
                        tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
                        tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 1);
                } else {
index a530e2a..a8faf66 100644 (file)
@@ -257,7 +257,8 @@ static void mmhub_v1_8_init_cache_regs(struct amdgpu_device *adev)
                WREG32_SOC15(MMHUB, i, regVM_L2_CNTL3, tmp);
 
                tmp = regVM_L2_CNTL4_DEFAULT;
-               if (adev->gmc.xgmi.connected_to_cpu) {
+               /* For AMD APP APUs setup WC memory */
+               if (adev->gmc.xgmi.connected_to_cpu || adev->gmc.is_app_apu) {
                        tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4,
                                            VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
                        tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4,