wifi: rtw89: add function to adjust and restore PLE quota
authorChih-Kang Chang <gary.chang@realtek.com>
Thu, 27 Oct 2022 05:27:03 +0000 (13:27 +0800)
committerKalle Valo <kvalo@kernel.org>
Tue, 1 Nov 2022 09:26:13 +0000 (11:26 +0200)
PLE RX quota, which is the setting of RX buffer, is needed to be adjusted
dynamically for WoWLAN mode, and restored when back to normal mode.
The action is not needed for rtw8852c chip.

Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com>
Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20221027052707.14605-4-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/mac.c
drivers/net/wireless/realtek/rtw89/mac.h
drivers/net/wireless/realtek/rtw89/rtw8852a.c

index 90bf7bd..10ccb04 100644 (file)
@@ -2389,6 +2389,7 @@ enum rtw89_dma_ch {
 enum rtw89_qta_mode {
        RTW89_QTA_SCC,
        RTW89_QTA_DLFW,
+       RTW89_QTA_WOW,
 
        /* keep last */
        RTW89_QTA_INVALID,
index de9708e..061244a 100644 (file)
@@ -1306,6 +1306,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
        .ple_qt47 = {525, 0, 32, 20, 1034, 13, 1199, 0, 1053, 62, 160, 1037,},
        /* PCIE 64 */
        .ple_qt58 = {147, 0, 16, 20, 157, 13, 229, 0, 172, 14, 24, 0,},
+       /* 8852A PCIE WOW */
+       .ple_qt_52a_wow = {264, 0, 32, 20, 64, 13, 1005, 0, 64, 128, 120,},
 };
 EXPORT_SYMBOL(rtw89_mac_size);
 
@@ -1478,6 +1480,36 @@ static void ple_quota_cfg(struct rtw89_dev *rtwdev,
                SET_QUOTA(tx_rpt, PLE, 11);
 }
 
+int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow)
+{
+       const struct rtw89_ple_quota *min_cfg, *max_cfg;
+       const struct rtw89_dle_mem *cfg;
+       u32 val;
+
+       if (rtwdev->chip->chip_id == RTL8852C)
+               return 0;
+
+       if (rtwdev->mac.qta_mode != RTW89_QTA_SCC) {
+               rtw89_err(rtwdev, "[ERR]support SCC mode only\n");
+               return -EINVAL;
+       }
+
+       if (wow)
+               cfg = get_dle_mem_cfg(rtwdev, RTW89_QTA_WOW);
+       else
+               cfg = get_dle_mem_cfg(rtwdev, RTW89_QTA_SCC);
+       if (!cfg) {
+               rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n");
+               return -EINVAL;
+       }
+
+       min_cfg = cfg->ple_min_qt;
+       max_cfg = cfg->ple_max_qt;
+       SET_QUOTA(cma0_dma, PLE, 6);
+       SET_QUOTA(cma1_dma, PLE, 7);
+
+       return 0;
+}
 #undef SET_QUOTA
 
 static void dle_quota_cfg(struct rtw89_dev *rtwdev,
index 6e03f5e..20211c4 100644 (file)
@@ -719,6 +719,7 @@ struct rtw89_mac_size_set {
        const struct rtw89_ple_quota ple_qt46;
        const struct rtw89_ple_quota ple_qt47;
        const struct rtw89_ple_quota ple_qt58;
+       const struct rtw89_ple_quota ple_qt_52a_wow;
 };
 
 extern const struct rtw89_mac_size_set rtw89_mac_size;
@@ -1026,5 +1027,6 @@ void rtw89_mac_pkt_drop_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif);
 u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd);
 int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev,
                        struct rtw89_cpuio_ctrl *ctrl_para, bool wd);
+int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow);
 
 #endif
index b5aa869..375e84f 100644 (file)
@@ -48,6 +48,10 @@ static const struct rtw89_dle_mem rtw8852a_dle_mem_pcie[] = {
                           &rtw89_mac_size.ple_size0, &rtw89_mac_size.wde_qt0,
                           &rtw89_mac_size.wde_qt0, &rtw89_mac_size.ple_qt4,
                           &rtw89_mac_size.ple_qt5},
+       [RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size0,
+                          &rtw89_mac_size.ple_size0, &rtw89_mac_size.wde_qt0,
+                          &rtw89_mac_size.wde_qt0, &rtw89_mac_size.ple_qt4,
+                          &rtw89_mac_size.ple_qt_52a_wow},
        [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size4,
                            &rtw89_mac_size.ple_size4, &rtw89_mac_size.wde_qt4,
                            &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13,