lcd: axg: update gp0_pll range for mipi-dsi usage [2/2]
authorEvoke Zhang <evoke.zhang@amlogic.com>
Tue, 11 Sep 2018 09:31:26 +0000 (17:31 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Thu, 11 Oct 2018 10:41:59 +0000 (03:41 -0700)
PD#173483: lcd: axg: update gp0_pll range for mipi-dsi usage

Change-Id: I7db9efef0b646665dae12c84ba3aacf53fb95bcc
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
drivers/amlogic/media/vout/lcd/lcd_clk_config.c
drivers/amlogic/media/vout/lcd/lcd_clk_config.h
drivers/amlogic/media/vout/lcd/lcd_debug.c
drivers/amlogic/media/vout/lcd/lcd_tablet/mipi_dsi_util.c

index 454c328..2eea34c 100644 (file)
@@ -914,7 +914,10 @@ static void lcd_set_pll_axg(struct lcd_clk_config_s *cConf)
        lcd_hiu_write(HHI_GP0_PLL_CNTL2_AXG, pll_ctrl2);
        lcd_hiu_write(HHI_GP0_PLL_CNTL3_AXG, 0x0a59a288);
        lcd_hiu_write(HHI_GP0_PLL_CNTL4_AXG, 0xc000004d);
-       lcd_hiu_write(HHI_GP0_PLL_CNTL5_AXG, 0x00078000);
+       if (cConf->pll_fvco >= 1632000)
+               lcd_hiu_write(HHI_GP0_PLL_CNTL5_AXG, 0x00058000);
+       else
+               lcd_hiu_write(HHI_GP0_PLL_CNTL5_AXG, 0x00078000);
        lcd_hiu_setb(HHI_GP0_PLL_CNTL_AXG, 1, LCD_PLL_RST_AXG, 1);
        lcd_hiu_setb(HHI_GP0_PLL_CNTL_AXG, 0, LCD_PLL_RST_AXG, 1);
 
@@ -1987,7 +1990,7 @@ static int check_pll_axg(struct lcd_clk_config_s *cConf,
                pll_fvco = pll_fvco / od_fb_table[od_fb];
                m = pll_fvco / cConf->fin;
                pll_frac = (pll_fvco % cConf->fin) *
-                                               cConf->pll_frac_range / cConf->fin;
+                               cConf->pll_frac_range / cConf->fin;
                cConf->pll_m = m;
                cConf->pll_n = n;
                cConf->pll_frac = pll_frac;
index fb0b6bf..b2ab734 100644 (file)
@@ -310,10 +310,10 @@ enum div_sel_e {
 #define PLL_FREF_MIN_AXG            (5 * 1000)
 #define PLL_FREF_MAX_AXG            (25 * 1000)
 #define PLL_VCO_MIN_AXG             (960 * 1000)
-#define PLL_VCO_MAX_AXG             (1632 * 1000)
+#define PLL_VCO_MAX_AXG             (1920 * 1000)
 
 /* video */
-#define CRT_VID_CLK_IN_MAX_AXG      (1632 * 1000)
+#define CRT_VID_CLK_IN_MAX_AXG      (1920 * 1000)
 #define ENCL_CLK_IN_MAX_AXG         (200 * 1000)
 
 /* G12A */
index 2f29580..4e154aa 100644 (file)
@@ -1457,9 +1457,13 @@ static ssize_t lcd_debug_change_store(struct class *class,
                struct class_attribute *attr, const char *buf, size_t count)
 {
        int ret = 0;
-       unsigned int temp, val[6];
+       unsigned int temp, val[10];
        struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
        struct lcd_config_s *pconf;
+       struct ttl_config_s *ttl_conf;
+       struct lvds_config_s *lvds_conf;
+       struct vbyone_config_s *vx1_conf;
+       struct dsi_config_s *dsi_conf;
 
        pconf = lcd_drv->lcd_config;
        switch (buf[0]) {
@@ -1560,6 +1564,118 @@ static ssize_t lcd_debug_change_store(struct class *class,
                        }
                }
                break;
+       case 't':
+               ttl_conf = pconf->lcd_control.ttl_config;
+               ret = sscanf(buf, "ttl %d %d %d %d %d",
+                       &val[0], &val[1], &val[2], &val[3], &val[4]);
+               if (ret == 5) {
+                       ttl_conf->clk_pol = val[0];
+                       ttl_conf->sync_valid = ((val[1] << 1) | val[2]);
+                       ttl_conf->swap_ctrl = ((val[3] << 1) | val[4]);
+                       pr_info("set ttl config:\n"
+       "clk_pol=%d, de_valid=%d, de_valid=%d, rb_swap=%d, bit_swap=%d\n",
+                               val[0], val[1], val[2], val[3], val[4]);
+                       lcd_debug_change_clk_change(pconf->lcd_timing.lcd_clk);
+                       pconf->change_flag = 1;
+               } else {
+                       LCDERR("invalid data\n");
+                       return -EINVAL;
+               }
+               break;
+       case 'l':
+               lvds_conf = pconf->lcd_control.lvds_config;
+               ret = sscanf(buf, "lvds %d %d %d %d %d",
+                       &val[0], &val[1], &val[2], &val[3], &val[4]);
+               if (ret == 5) {
+                       lvds_conf->lvds_repack = val[0];
+                       lvds_conf->dual_port = val[1];
+                       lvds_conf->pn_swap = val[2];
+                       lvds_conf->port_swap = val[3];
+                       lvds_conf->lane_reverse = val[4];
+                       pr_info("set lvds config:\n"
+       "repack=%d, dual_port=%d, pn_swap=%d, port_swap=%d, lane_reverse=%d\n",
+                               lvds_conf->lvds_repack, lvds_conf->dual_port,
+                               lvds_conf->pn_swap, lvds_conf->port_swap,
+                               lvds_conf->lane_reverse);
+                       lcd_debug_change_clk_change(pconf->lcd_timing.lcd_clk);
+                       pconf->change_flag = 1;
+               } else if (ret == 4) {
+                       lvds_conf->lvds_repack = val[0];
+                       lvds_conf->dual_port = val[1];
+                       lvds_conf->pn_swap = val[2];
+                       lvds_conf->port_swap = val[3];
+                       pr_info("set lvds config:\n"
+                       "repack=%d, dual_port=%d, pn_swap=%d, port_swap=%d\n",
+                               lvds_conf->lvds_repack, lvds_conf->dual_port,
+                               lvds_conf->pn_swap, lvds_conf->port_swap);
+                       lcd_debug_change_clk_change(pconf->lcd_timing.lcd_clk);
+                       pconf->change_flag = 1;
+               } else {
+                       LCDERR("invalid data\n");
+                       return -EINVAL;
+               }
+               break;
+       case 'v':
+               vx1_conf = pconf->lcd_control.vbyone_config;
+               ret = sscanf(buf, "vbyone %d %d %d %d",
+                       &val[0], &val[1], &val[2], &val[3]);
+               if (ret == 4 || ret == 3) {
+                       vx1_conf->lane_count = val[0];
+                       vx1_conf->region_num = val[1];
+                       vx1_conf->byte_mode = val[2];
+                       pr_info("set vbyone config:\n"
+                               "lane_count=%d, region_num=%d, byte_mode=%d\n",
+                               vx1_conf->lane_count, vx1_conf->region_num,
+                               vx1_conf->byte_mode);
+                       lcd_debug_change_clk_change(pconf->lcd_timing.lcd_clk);
+                       pconf->change_flag = 1;
+               } else {
+                       LCDERR("invalid data\n");
+                       return -EINVAL;
+               }
+               break;
+       case 'm':
+               dsi_conf = pconf->lcd_control.mipi_config;
+               ret = sscanf(buf, "mipi %d %d %d %d %d %d %d %d",
+                       &val[0], &val[1], &val[2], &val[3],
+                       &val[4], &val[5], &val[6], &val[7]);
+               if (ret == 8) {
+                       dsi_conf->lane_num = (unsigned char)val[0];
+                       dsi_conf->bit_rate_max = val[1];
+                       dsi_conf->factor_numerator = val[2];
+                       dsi_conf->operation_mode_init = (unsigned char)val[3];
+                       dsi_conf->operation_mode_display =
+                               (unsigned char)val[4];
+                       dsi_conf->video_mode_type = (unsigned char)val[5];
+                       dsi_conf->clk_always_hs = (unsigned char)val[6];
+                       dsi_conf->phy_switch = (unsigned char)val[7];
+                       pr_info("change mipi_dsi config:\n"
+                       "lane_num=%d, bit_rate_max=%dMhz, factor_numerator=%d\n"
+                       "operation_mode_init=%d, operation_mode_display=%d\n"
+                       "video_mode_type=%d, clk_always_hs=%d, phy_switch=%d\n",
+                               dsi_conf->lane_num,
+                               dsi_conf->bit_rate_max,
+                               dsi_conf->factor_numerator,
+                               dsi_conf->operation_mode_init,
+                               dsi_conf->operation_mode_display,
+                               dsi_conf->video_mode_type,
+                               dsi_conf->clk_always_hs,
+                               dsi_conf->phy_switch);
+                       lcd_debug_change_clk_change(pconf->lcd_timing.lcd_clk);
+                       pconf->change_flag = 1;
+               } else {
+                       LCDERR("invalid data\n");
+                       return -EINVAL;
+               }
+               break;
+       case 'u': /* update */
+               if (pconf->change_flag) {
+                       LCDPR("apply config changing\n");
+                       lcd_debug_config_update();
+               } else {
+                       LCDPR("config is no changing\n");
+               }
+               break;
        default:
                LCDERR("wrong command\n");
                break;
@@ -2122,10 +2238,10 @@ static ssize_t lcd_debug_reg_store(struct class *class,
                        bus = 3;
                } else if (buf[1] == 'm') {
                        if (buf[2] == 'h') { /* mipi host */
-                               ret = sscanf(buf, "dmh %x %x", &reg32, &data32);
+                               ret = sscanf(buf, "dmh %x %d", &reg32, &data32);
                                bus = 4;
                        } else if (buf[2] == 'p') { /* mipi phy */
-                               ret = sscanf(buf, "dmp %x %x", &reg32, &data32);
+                               ret = sscanf(buf, "dmp %x %d", &reg32, &data32);
                                bus = 5;
                        }
                }
index fd7afac..bd1fa32 100644 (file)
@@ -1703,10 +1703,12 @@ static void mipi_dsi_video_config(struct lcd_config_s *pconf)
 static void mipi_dsi_non_burst_packet_config(struct lcd_config_s *pconf)
 {
        struct dsi_config_s *dconf = pconf->lcd_control.mipi_config;
-       int lane_num, clk_factor, hactive, multi_pkt_en, bit_rate_required;
-       int pixel_per_chunk = 0, vid_num_chunks = 0;
-       int byte_per_chunk = 0, vid_pkt_byte_per_chunk = 0;
-       int total_bytes_per_chunk = 0, chunk_overhead = 0, vid_null_size = 0;
+       unsigned int lane_num, clk_factor, hactive, multi_pkt_en;
+       unsigned int bit_rate_required;
+       unsigned int pixel_per_chunk = 0, vid_num_chunks = 0;
+       unsigned int byte_per_chunk = 0, vid_pkt_byte_per_chunk = 0;
+       unsigned int total_bytes_per_chunk = 0;
+       unsigned int chunk_overhead = 0, vid_null_size = 0;
        int i = 1, done = 0;
 
        lane_num = (int)(dconf->lane_num);