i965: Set the maximum number of GS URB entries on Sandybridge.

We never filled this in before because we didn't care.

I'm skeptical these are correct; my sources indicate that both the VS
and GS # of entries are 256 on both GT1 and GT2.

I'm also loathe to change it and break stuff.

Reviewed-by: Paul Berry <stereotype441@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 1163007..f971649 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -284,12 +284,14 @@ brwCreateContext(int api,
         brw->max_gs_threads = 60;
         brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
         brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
+        brw->urb.max_gs_entries = 256;
       } else {
         brw->max_wm_threads = 40;
         brw->max_vs_threads = 24;
         brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
         brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
         brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
+        brw->urb.max_gs_entries = 256;
       }
    } else if (intel->gen == 5) {
       brw->urb.size = 1024;