+2018-07-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_reg_size): Renamed to ...
+ (match_operand_size): This. Update comments.
+ (match_simd_size): Update comments. Replace match_reg_size
+ with match_operand_size.
+ (match_mem_size): Likewise.
+ (operand_size_match): Replace match_reg_size with
+ match_operand_size.
+
2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
Maciej W. Rozycki <macro@mips.com>
return 0;
}
-/* Return 1 if there is no conflict in 8bit/16bit/32bit/64bit/80bit on
- operand J for instruction template T. */
+/* Return 1 if there is no conflict in 8bit/16bit/32bit/64bit/80bit size
+ between operand GIVEN and opeand WANTED for instruction template T. */
static INLINE int
-match_reg_size (const insn_template *t, unsigned int wanted, unsigned int given)
+match_operand_size (const insn_template *t, unsigned int wanted,
+ unsigned int given)
{
return !((i.types[given].bitfield.byte
&& !t->operand_types[wanted].bitfield.byte)
&& !t->operand_types[wanted].bitfield.tbyte));
}
-/* Return 1 if there is no conflict in SIMD register on
- operand J for instruction template T. */
+/* Return 1 if there is no conflict in SIMD register between operand GIVEN
+ and opeand WANTED for instruction template T. */
static INLINE int
match_simd_size (const insn_template *t, unsigned int wanted, unsigned int given)
&& !t->operand_types[wanted].bitfield.zmmword));
}
-/* Return 1 if there is no conflict in any size on operand J for
- instruction template T. */
+/* Return 1 if there is no conflict in any size between operand GIVEN
+ and opeand WANTED for instruction template T. */
static INLINE int
match_mem_size (const insn_template *t, unsigned int wanted, unsigned int given)
{
- return (match_reg_size (t, wanted, given)
+ return (match_operand_size (t, wanted, given)
&& !((i.types[given].bitfield.unspecified
&& !i.broadcast
&& !t->operand_types[wanted].bitfield.unspecified)
continue;
if (t->operand_types[j].bitfield.reg
- && !match_reg_size (t, j, j))
+ && !match_operand_size (t, j, j))
{
match = 0;
break;
}
if (t->operand_types[j].bitfield.acc
- && (!match_reg_size (t, j, j) || !match_simd_size (t, j, j)))
+ && (!match_operand_size (t, j, j) || !match_simd_size (t, j, j)))
{
match = 0;
break;
{
if ((t->operand_types[j].bitfield.reg
|| t->operand_types[j].bitfield.acc)
- && !match_reg_size (t, j, !j))
+ && !match_operand_size (t, j, !j))
goto mismatch;
if (i.types[!j].bitfield.mem