ac/surface: initialize dcc_slice_size on GFX9+
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Thu, 7 Jan 2021 15:18:31 +0000 (16:18 +0100)
committerMarge Bot <eric+marge@anholt.net>
Mon, 11 Jan 2021 15:42:22 +0000 (15:42 +0000)
Will be used by RADV to implement DCC layers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8368>

src/amd/common/ac_surface.c

index d9aef6e..fc29146 100644 (file)
@@ -1844,6 +1844,7 @@ static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_
          surf->u.gfx9.dcc_block_height = dout.compressBlkHeight;
          surf->u.gfx9.dcc_block_depth = dout.compressBlkDepth;
          surf->dcc_size = dout.dccRamSize;
+         surf->dcc_slice_size = dout.dccRamSliceSize;
          surf->dcc_alignment = dout.dccRamBaseAlign;
          surf->num_dcc_levels = in->numMipLevels;