module_param(dif01_ratio, int, 0644);
MODULE_PARM_DESC(dif01_ratio, "dif01_ratio");
+static int nflagch4_ratio = 1;
+module_param(nflagch4_ratio, int, 0644);
+MODULE_PARM_DESC(nflagch4_ratio, "nflagch4_ratio");
+
+static int nflagch5_ratio = 2;
+module_param(nflagch5_ratio, int, 0644);
+MODULE_PARM_DESC(nflagch5_ratio, "nflagch5_ratio");
+
+static int nflagch4_th = 0;
+module_param(nflagch4_th, int, 0644);
+MODULE_PARM_DESC(nflagch4_th, "nflagch4_th");
+
+static int nflagch5_th = 0;
+module_param(nflagch5_th, int, 0644);
+MODULE_PARM_DESC(nflagch5_th, "nflagch5_th");
+
+static int dif02_flag = 1;
+module_param(dif02_flag, int, 0644);
+MODULE_PARM_DESC(dif02_flag, "dif02_flag");
+
+static int dif02_ratio = 20;
+module_param(dif02_ratio, int, 0644);
+MODULE_PARM_DESC(dif02_ratio, "dif02_ratio");
static int flm22_force;
int nFlgChk1 = 0;
int nFlgChk2 = 0;
int nFlgChk3 = 0; /* for Mit32VHLine */
+ int nFlgChk4 = 0;
+ int nFlgChk5 = 0;
+ int nMean = 0;
int luma_avg = 0;
int flm32_dif02_gap = 0;
nFlgChk1 = 0;
nFlgChk2 = 0;
}
+ //nFlgChk4/5 large dif change quit mode
+ if (
+ pFlg32[HISDETNUM - 1] > 1 && (dif02_flag ||
+ nDif02[HISDIFNUM - 1] > (1 << dif02_ratio))) {
+ nFlgChk4 = nDif02[HISDIFNUM - 1] - nDif02[HISDIFNUM - 6];
+ if (nFlgChk4 < 0)
+ nFlgChk4 = -nFlgChk4;
+ nFlgChk4 = nFlgChk4;
+ nMean = (nDif02[HISDIFNUM - 1] + nDif01[HISDIFNUM - 6]) / 2;
+ nFlgChk4 = nflagch4_ratio * nFlgChk4 / nMean;
+ } else {
+ nFlgChk4 = 0;
+ }
+ if (
+ pFlg32[HISDETNUM - 1] == 1 ||
+ pFlg32[HISDETNUM - 1] == 2 ||
+ pFlg32[HISDETNUM - 1] == 4) {
+ nFlgChk5 = nDif01[HISDIFNUM - 1] - nDif01[HISDIFNUM - 6];
+ if (nFlgChk5 < 0)
+ nFlgChk5 = -nFlgChk5;
+ nMean = (nDif01[HISDIFNUM - 1] + nDif01[HISDIFNUM - 6]) / 2;
+ nFlgChk5 = nflagch5_ratio * nFlgChk5 / nMean;
+ } else {
+ nFlgChk5 = 0;
+ }
+ if (prt_flg)
+ sprintf(debug_str + strlen(debug_str),
+ "nFlgChk4/5=(%2d,%2d)\n",
+ nFlgChk4, nFlgChk5);
nT2 = 5 * nDif02[HISDIFNUM - 1] / (nMn + sFrmDifLgTDif + 1);
nT2 = nT2>>1;
if (nSTP > 16)
nSTP = 16;
/*patch for dark scenes don't into pulldown32 by vlsi yanling*/
- if (((nMx + nMn/2) / (nMn + 1)) < flm32_dif02_gap)
+ if (
+ ((nMx + nMn / 2) / (nMn + 1)) < flm32_dif02_gap &&
+ pFlg32[HISDETNUM - 1] > 1)
nSTP = 0;
/*---------------*/
for (nT0 = 1; nT0 < HISDETNUM; nT0++) {
}
nFlg12[nT0] = ((nSTP + 8) >> 4);
+
+ if (nT0 == 5 && nMIX == 1 && nFlg01[nT0] == 0)
+ nFlg12[nT0] = 0;
}
/* -------------------------------------------- */
(nFlgChk3 > flm32_ck13_rtn))
|| (nFlgChk2 > flm32_chk2_rtn)
|| ((pFlg32[HISDETNUM-1] == 4) &&
- (nFlgChk3 > flm32_chk3_rtn))) {
+ (nFlgChk3 > flm32_chk3_rtn)) ||
+ (nFlgChk4 > nflagch4_th ||
+ nFlgChk5 > nflagch5_th)) {
pRDat->pMod32[HISDETNUM - 1] = 0;
pRDat->pFlg32[HISDETNUM - 1] = 0;