imx: ventana: add HDMI and LVDS display capability

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index bce11b24d62ec3f2ad6589f572a9b9c97bd3a1f9..031367d97a8e69cd24d73e1cd37181b123b48a9b 100644 (file)
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -12,6 +12,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <asm/arch/mxc_hdmi.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
@@ -19,6 +20,7 @@
 #include <asm/imx-common/mxc_i2c.h>
 #include <asm/imx-common/boot_mode.h>
 #include <asm/imx-common/sata.h>
+#include <asm/imx-common/video.h>
 #include <jffs2/load_kernel.h>
 #include <hwconfig.h>
 #include <i2c.h>
@@ -369,6 +371,134 @@ int board_eth_init(bd_t *bis)
        return 0;
 }
 
+#if defined(CONFIG_VIDEO_IPUV3)
+
+static void enable_hdmi(struct display_info_t const *dev)
+{
+       imx_enable_hdmi_phy();
+}
+
+static int detect_i2c(struct display_info_t const *dev)
+{
+       return i2c_set_bus_num(dev->bus) == 0 &&
+               i2c_probe(dev->addr) == 0;
+}
+
+static void enable_lvds(struct display_info_t const *dev)
+{
+       struct iomuxc *iomux = (struct iomuxc *)
+                               IOMUXC_BASE_ADDR;
+
+       /* set CH0 data width to 24bit (IOMUXC_GPR2:5 0=18bit, 1=24bit) */
+       u32 reg = readl(&iomux->gpr[2]);
+       reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT;
+       writel(reg, &iomux->gpr[2]);
+
+       /* Enable Backlight */
+       imx_iomux_v3_setup_pad(MX6_PAD_SD1_CMD__GPIO1_IO18 |
+                              MUX_PAD_CTRL(NO_PAD_CTRL));
+       gpio_direction_output(IMX_GPIO_NR(1, 18), 1);
+}
+
+struct display_info_t const displays[] = {{
+       /* HDMI Output */
+       .bus    = -1,
+       .addr   = 0,
+       .pixfmt = IPU_PIX_FMT_RGB24,
+       .detect = detect_hdmi,
+       .enable = enable_hdmi,
+       .mode   = {
+               .name           = "HDMI",
+               .refresh        = 60,
+               .xres           = 1024,
+               .yres           = 768,
+               .pixclock       = 15385,
+               .left_margin    = 220,
+               .right_margin   = 40,
+               .upper_margin   = 21,
+               .lower_margin   = 7,
+               .hsync_len      = 60,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       /* Freescale MXC-LVDS1: HannStar HSD100PXN1-A00 w/ egalx_ts cont */
+       .bus    = 2,
+       .addr   = 0x4,
+       .pixfmt = IPU_PIX_FMT_LVDS666,
+       .detect = detect_i2c,
+       .enable = enable_lvds,
+       .mode   = {
+               .name           = "Hannstar-XGA",
+               .refresh        = 60,
+               .xres           = 1024,
+               .yres           = 768,
+               .pixclock       = 15385,
+               .left_margin    = 220,
+               .right_margin   = 40,
+               .upper_margin   = 21,
+               .lower_margin   = 7,
+               .hsync_len      = 60,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
+} } };
+size_t display_count = ARRAY_SIZE(displays);
+
+static void setup_display(void)
+{
+       struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+       int reg;
+
+       enable_ipu_clock();
+       imx_setup_hdmi();
+       /* Turn on LDB0,IPU,IPU DI0 clocks */
+       reg = __raw_readl(&mxc_ccm->CCGR3);
+       reg |= MXC_CCM_CCGR3_LDB_DI0_MASK;
+       writel(reg, &mxc_ccm->CCGR3);
+
+       /* set LDB0, LDB1 clk select to 011/011 */
+       reg = readl(&mxc_ccm->cs2cdr);
+       reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
+                |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
+       reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)
+             |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
+       writel(reg, &mxc_ccm->cs2cdr);
+
+       reg = readl(&mxc_ccm->cscmr2);
+       reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV;
+       writel(reg, &mxc_ccm->cscmr2);
+
+       reg = readl(&mxc_ccm->chsccdr);
+       reg |= (CHSCCDR_CLK_SEL_LDB_DI0
+               <<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+       writel(reg, &mxc_ccm->chsccdr);
+
+       reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
+            |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH
+            |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
+            |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
+            |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
+            |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
+            |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
+            |IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
+            |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
+       writel(reg, &iomux->gpr[2]);
+
+       reg = readl(&iomux->gpr[3]);
+       reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK)
+           | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
+              <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
+       writel(reg, &iomux->gpr[3]);
+
+       /* Backlight CABEN on LVDS connector */
+       imx_iomux_v3_setup_pad(MX6_PAD_SD2_CLK__GPIO1_IO10 |
+                              MUX_PAD_CTRL(NO_PAD_CTRL));
+       gpio_direction_output(IMX_GPIO_NR(1, 10), 0);
+}
+#endif /* CONFIG_VIDEO_IPUV3 */
+
 /* read ventana EEPROM, check for validity, and return baseboard type */
 static int
 read_eeprom(void)
@@ -944,6 +1074,9 @@ int board_early_init_f(void)
        setup_iomux_uart();
        gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
 
+#if defined(CONFIG_VIDEO_IPUV3)
+       setup_display();
+#endif
        return 0;
 }
 

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 335f2ff6aa57a95acc5cb0a00b73c541ccce603e..cd554957dd89148dbe33c2b38160bbd9714c1656 100644 (file)
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -194,6 +194,22 @@
 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
 #define CONFIG_USB_HUB_MIN_POWER_ON_DELAY 1200
 
+/* Framebuffer and LCD */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_IPUV3_CLK          260000000
+#define CONFIG_CMD_HDMIDETECT
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_IMX_HDMI
+#define CONFIG_IMX_VIDEO_SKIP
+
 /* serial console (ttymxc1,115200) */
 #define CONFIG_CONS_INDEX              1
 #define CONFIG_BAUDRATE                115200