MIPS: Ingenic: Add Ingenic X1000 support.
author周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Tue, 10 Dec 2019 12:02:40 +0000 (20:02 +0800)
committerPaul Burton <paulburton@kernel.org>
Thu, 9 Jan 2020 17:43:58 +0000 (09:43 -0800)
Support the Ingenic X1000 SoC using the code under arch/mips/jz4740.
This is left unselectable in Kconfig until a X1000 based board is
added in a later commit.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: robh+dt@kernel.org
Cc: paul.burton@mips.com
Cc: jhogan@kernel.org
Cc: mripard@kernel.org
Cc: shawnguo@kernel.org
Cc: mark.rutland@arm.com
Cc: alexandre.belloni@bootlin.com
Cc: ralf@linux-mips.org
Cc: heiko@sntech.de
Cc: icenowy@aosc.io
Cc: ak@linux.intel.com
Cc: laurent.pinchart@ideasonboard.com
Cc: krzk@kernel.org
Cc: geert+renesas@glider.be
Cc: paul@crapouillou.net
Cc: prasannatsmkumar@gmail.com
Cc: keescook@chromium.org
Cc: ebiederm@xmission.com
Cc: sernia.zhou@foxmail.com
Cc: zhenwenjin@gmail.com
Cc: 772753199@qq.com
arch/mips/boot/dts/ingenic/x1000.dtsi [new file with mode: 0644]
arch/mips/jz4740/Kconfig

diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi
new file mode 100644 (file)
index 0000000..61061a4
--- /dev/null
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/x1000-cgu.h>
+#include <dt-bindings/dma/x1000-dma.h>
+
+/ {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       compatible = "ingenic,x1000", "ingenic,x1000e";
+
+       cpuintc: interrupt-controller {
+               #address-cells = <0>;
+               #interrupt-cells = <1>;
+               interrupt-controller;
+               compatible = "mti,cpu-interrupt-controller";
+       };
+
+       intc: interrupt-controller@10001000 {
+               compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
+               reg = <0x10001000 0x50>;
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+
+               interrupt-parent = <&cpuintc>;
+               interrupts = <2>;
+       };
+
+       exclk: ext {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+       };
+
+       rtclk: rtc {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <32768>;
+       };
+
+       cgu: x1000-cgu@10000000 {
+               compatible = "ingenic,x1000-cgu";
+               reg = <0x10000000 0x100>;
+
+               #clock-cells = <1>;
+
+               clocks = <&exclk>, <&rtclk>;
+               clock-names = "ext", "rtc";
+       };
+
+       tcu: timer@10002000 {
+               compatible = "ingenic,x1000-tcu",
+                                "ingenic,jz4770-tcu",
+                                "simple-mfd";
+               reg = <0x10002000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x10002000 0x1000>;
+
+               #clock-cells = <1>;
+
+               clocks = <&cgu X1000_CLK_RTCLK
+                         &cgu X1000_CLK_EXCLK
+                         &cgu X1000_CLK_PCLK>;
+               clock-names = "rtc", "ext", "pclk";
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <27 26 25>;
+
+               wdt: watchdog@0 {
+                       compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog";
+                       reg = <0x0 0x10>;
+
+                       clocks = <&cgu X1000_CLK_RTCLK>;
+                       clock-names = "wdt";
+               };
+       };
+
+       rtc: rtc@10003000 {
+               compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc";
+               reg = <0x10003000 0x4c>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <32>;
+
+               clocks = <&cgu X1000_CLK_RTCLK>;
+               clock-names = "rtc";
+       };
+
+       pinctrl: pin-controller@10010000 {
+               compatible = "ingenic,x1000-pinctrl";
+               reg = <0x10010000 0x800>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpa: gpio@0 {
+                       compatible = "ingenic,x1000-gpio";
+                       reg = <0>;
+
+                       gpio-controller;
+                       gpio-ranges = <&pinctrl 0 0 32>;
+                       #gpio-cells = <2>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&intc>;
+                       interrupts = <17>;
+               };
+
+               gpb: gpio@1 {
+                       compatible = "ingenic,x1000-gpio";
+                       reg = <1>;
+
+                       gpio-controller;
+                       gpio-ranges = <&pinctrl 0 32 32>;
+                       #gpio-cells = <2>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&intc>;
+                       interrupts = <16>;
+               };
+
+               gpc: gpio@2 {
+                       compatible = "ingenic,x1000-gpio";
+                       reg = <2>;
+
+                       gpio-controller;
+                       gpio-ranges = <&pinctrl 0 64 32>;
+                       #gpio-cells = <2>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&intc>;
+                       interrupts = <15>;
+               };
+
+               gpd: gpio@3 {
+                       compatible = "ingenic,x1000-gpio";
+                       reg = <3>;
+
+                       gpio-controller;
+                       gpio-ranges = <&pinctrl 0 96 32>;
+                       #gpio-cells = <2>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&intc>;
+                       interrupts = <14>;
+               };
+       };
+
+       uart0: serial@10030000 {
+               compatible = "ingenic,x1000-uart";
+               reg = <0x10030000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <51>;
+
+               clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+
+       uart1: serial@10031000 {
+               compatible = "ingenic,x1000-uart";
+               reg = <0x10031000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <50>;
+
+               clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+
+       uart2: serial@10032000 {
+               compatible = "ingenic,x1000-uart";
+               reg = <0x10032000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <49>;
+
+               clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+
+       pdma: dma-controller@13420000 {
+               compatible = "ingenic,x1000-dma";
+               reg = <0x13420000 0x400
+                          0x13421000 0x40>;
+               #dma-cells = <2>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <10>;
+
+               clocks = <&cgu X1000_CLK_PDMA>;
+       };
+
+       mac: ethernet@134b0000 {
+               compatible = "ingenic,x1000-mac", "snps,dwmac";
+               reg = <0x134b0000 0x2000>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <55>;
+               interrupt-names = "macirq";
+
+               clocks = <&cgu X1000_CLK_MAC>;
+               clock-names = "stmmaceth";
+
+               status = "disabled";
+
+               mdio: mdio {
+                       compatible = "snps,dwmac-mdio";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       status = "disabled";
+               };
+       };
+
+       msc0: mmc@13450000 {
+               compatible = "ingenic,x1000-mmc";
+               reg = <0x13450000 0x1000>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <37>;
+
+               clocks = <&cgu X1000_CLK_MSC0>;
+               clock-names = "mmc";
+
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               cap-sdio-irq;
+
+               dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
+                          <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
+               dma-names = "rx", "tx";
+
+               status = "disabled";
+       };
+
+       msc1: mmc@13460000 {
+               compatible = "ingenic,x1000-mmc";
+               reg = <0x13460000 0x1000>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <36>;
+
+               clocks = <&cgu X1000_CLK_MSC1>;
+               clock-names = "mmc";
+
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               cap-sdio-irq;
+
+               dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
+                          <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
+               dma-names = "rx", "tx";
+
+               status = "disabled";
+       };
+};
index 4dd0c44..6b96844 100644 (file)
@@ -33,3 +33,9 @@ config MACH_JZ4780
        select MIPS_CPU_SCACHE
        select SYS_HAS_CPU_MIPS32_R2
        select SYS_SUPPORTS_HIGHMEM
+
+config MACH_X1000
+       bool
+       select MIPS_CPU_SCACHE
+       select SYS_HAS_CPU_MIPS32_R2
+       select SYS_SUPPORTS_HIGHMEM