cpupower: Correct macro name for CPB caps flag

The name is Core Performance Boost (CPB) for the cpuid flag. Correct
cpuid caps flag to use this name (instead of CBP).

Signed-off-by: Robert Richter <rrichter@amd.com>
Signed-off-by: Nathan Fontenot <nathan.fontenot@amd.com>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>

diff --git a/tools/power/cpupower/utils/helpers/cpuid.c b/tools/power/cpupower/utils/helpers/cpuid.c
index 73bfafc..f9a66a4 100644 (file)
--- a/tools/power/cpupower/utils/helpers/cpuid.c
+++ b/tools/power/cpupower/utils/helpers/cpuid.c
@@ -130,7 +130,7 @@ out:
            cpu_info->vendor == X86_VENDOR_HYGON) {
                if (ext_cpuid_level >= 0x80000007 &&
                    (cpuid_edx(0x80000007) & (1 << 9)))
-                       cpu_info->caps |= CPUPOWER_CAP_AMD_CBP;
+                       cpu_info->caps |= CPUPOWER_CAP_AMD_CPB;
 
                if (ext_cpuid_level >= 0x80000008 &&
                    cpuid_ebx(0x80000008) & (1 << 4))

diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h
index 0642e60..a84f85a 100644 (file)
--- a/tools/power/cpupower/utils/helpers/helpers.h
+++ b/tools/power/cpupower/utils/helpers/helpers.h
@@ -64,7 +64,7 @@ enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL,
 
 #define CPUPOWER_CAP_INV_TSC           0x00000001
 #define CPUPOWER_CAP_APERF             0x00000002
-#define CPUPOWER_CAP_AMD_CBP           0x00000004
+#define CPUPOWER_CAP_AMD_CPB           0x00000004
 #define CPUPOWER_CAP_PERF_BIAS         0x00000008
 #define CPUPOWER_CAP_HAS_TURBO_RATIO   0x00000010
 #define CPUPOWER_CAP_IS_SNB            0x00000020

diff --git a/tools/power/cpupower/utils/helpers/misc.c b/tools/power/cpupower/utils/helpers/misc.c
index 650b9a9..f9bcce9 100644 (file)
--- a/tools/power/cpupower/utils/helpers/misc.c
+++ b/tools/power/cpupower/utils/helpers/misc.c
@@ -26,7 +26,7 @@ int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,
        if (ret)
                return ret;
 
-       if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CBP) {
+       if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CPB) {
                *support = 1;
 
                /* AMD Family 0x17 does not utilize PCI D18F4 like prior