riscv: dts: Remove unsupported cpuidle state

The cpuidle state1 is also implemented in sbi with
WFI C state, but it cause audio play failed.
Remove the cpuidle state1.

Signed-off-by: mason.huo <mason.huo@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 6a2b038..777bd80 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -57,7 +57,6 @@
                        i-tlb-sets = <1>;
                        i-tlb-size = <40>;
                        mmu-type = "riscv,sv39";
-                       cpu-idle-states = <&CPU_NONRET_0_0>;
                        next-level-cache = <&cachectrl>;
                        riscv,isa = "rv64imac";
                        tlb-split;
@@ -85,7 +84,6 @@
                        i-tlb-sets = <1>;
                        i-tlb-size = <40>;
                        mmu-type = "riscv,sv39";
-                       cpu-idle-states = <&CPU_NONRET_0_0>;
                        next-level-cache = <&cachectrl>;
                        riscv,isa = "rv64imafdc";
                        tlb-split;
@@ -114,7 +112,6 @@
                        i-tlb-sets = <1>;
                        i-tlb-size = <40>;
                        mmu-type = "riscv,sv39";
-                       cpu-idle-states = <&CPU_NONRET_0_0>;
                        next-level-cache = <&cachectrl>;
                        riscv,isa = "rv64imafdc";
                        tlb-split;
@@ -143,7 +140,6 @@
                        i-tlb-sets = <1>;
                        i-tlb-size = <40>;
                        mmu-type = "riscv,sv39";
-                       cpu-idle-states = <&CPU_NONRET_0_0>;
                        next-level-cache = <&cachectrl>;
                        riscv,isa = "rv64imafdc";
                        tlb-split;
@@ -172,7 +168,6 @@
                        i-tlb-sets = <1>;
                        i-tlb-size = <40>;
                        mmu-type = "riscv,sv39";
-                       cpu-idle-states = <&CPU_NONRET_0_0>;
                        next-level-cache = <&cachectrl>;
                        riscv,isa = "rv64imafdc";
                        tlb-split;
@@ -187,17 +182,6 @@
                };
        };
 
-       idle-states {
-               CPU_NONRET_0_0: cpu-nonretentive-0-0 {
-                       compatible = "riscv,idle-state";
-                       riscv,sbi-suspend-param = <0x80000000>;
-                       entry-latency-us = <600>;
-                       exit-latency-us = <1100>;
-                       min-residency-us = <2700>;
-                       wakeup-latency-us = <1500>;
-               };
-       };
-
        soc: soc {
                compatible = "simple-bus";
                interrupt-parent = <&plic>;