arm64: dts: mt2712: update ethernet device node
authorBiao Huang <biao.huang@mediatek.com>
Mon, 14 Mar 2022 07:57:10 +0000 (15:57 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 16 Mar 2022 12:49:23 +0000 (12:49 +0000)
Since there are some changes in ethernet driver:
update ethernet device node in dts to accommodate to it.

1. stmmac_probe_config_dt() in stmmac_platform.c will initialize specified
   parameters according to compatible string "snps,dwmac-4.20a", then,
   dwmac-mediatek.c can skip the initialization if add compatible string
   "snps,dwmac-4.20a" in eth device node.
2. commit 882007ed7832 ("net-next: dt-binding: dwmac-mediatek: add more
   description for RMII") added rmii internal support, we should add
   corresponding clocks/clocks-names in eth device node.
3. add "snps,reset-delays-us = <0 10000 10000>;" to ensure reset delay
   can meet PHY requirement.

Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
arch/arm64/boot/dts/mediatek/mt2712-evb.dts
arch/arm64/boot/dts/mediatek/mt2712e.dtsi

index 7d369fd..11aa135 100644 (file)
        phy-handle = <&ethernet_phy0>;
        mediatek,tx-delay-ps = <1530>;
        snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;
+       snps,reset-delays-us = <0 10000 10000>;
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&eth_default>;
        pinctrl-1 = <&eth_sleep>;
index de16c0d..a27b762 100644 (file)
        };
 
        eth: ethernet@1101c000 {
-               compatible = "mediatek,mt2712-gmac";
+               compatible = "mediatek,mt2712-gmac", "snps,dwmac-4.20a";
                reg = <0 0x1101c000 0 0x1300>;
                interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>;
                interrupt-names = "macirq";
                clock-names = "axi",
                              "apb",
                              "mac_main",
-                             "ptp_ref";
+                             "ptp_ref",
+                             "rmii_internal";
                clocks = <&pericfg CLK_PERI_GMAC>,
                         <&pericfg CLK_PERI_GMAC_PCLK>,
                         <&topckgen CLK_TOP_ETHER_125M_SEL>,
-                        <&topckgen CLK_TOP_ETHER_50M_SEL>;
+                        <&topckgen CLK_TOP_ETHER_50M_SEL>,
+                        <&topckgen CLK_TOP_ETHER_50M_RMII_SEL>;
                assigned-clocks = <&topckgen CLK_TOP_ETHER_125M_SEL>,
-                                 <&topckgen CLK_TOP_ETHER_50M_SEL>;
+                                 <&topckgen CLK_TOP_ETHER_50M_SEL>,
+                                 <&topckgen CLK_TOP_ETHER_50M_RMII_SEL>;
                assigned-clock-parents = <&topckgen CLK_TOP_ETHERPLL_125M>,
-                                        <&topckgen CLK_TOP_APLL1_D3>;
+                                        <&topckgen CLK_TOP_APLL1_D3>,
+                                        <&topckgen CLK_TOP_ETHERPLL_50M>;
                power-domains = <&scpsys MT2712_POWER_DOMAIN_AUDIO>;
                mediatek,pericfg = <&pericfg>;
                snps,axi-config = <&stmmac_axi_setup>;