clk: samsung: add new CLK_MOUT_WCORE for NoC in Exynos5420 SoC

New clock ID (CLK_MOUT_WCORE) is needed for changing parent of the main
NoC bus clock.

Change-Id: I21dbd629d0f4529f94ca0c07982cddcef63f7cc4
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>

diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 0484781..7695c74 100644 (file)
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -235,6 +235,7 @@
 #define CLK_MOUT_ACLK_G3D      661
 #define CLK_MOUT_SCLK_SPLL     662
 #define CLK_MOUT_MX_MSPLL_CCORE_PHY    663
+#define CLK_MOUT_WCORE         664
 
 /* divider clocks */
 #define CLK_DOUT_PIXEL         768