arm64: dts: ti: k3-am64: Enable SPI nodes at the board level
authorAndrew Davis <afd@ti.com>
Mon, 17 Oct 2022 19:25:25 +0000 (14:25 -0500)
committerNishanth Menon <nm@ti.com>
Fri, 28 Oct 2022 13:14:48 +0000 (08:14 -0500)
SPI nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the SPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20221017192532.23825-4-afd@ti.com
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
arch/arm64/boot/dts/ti/k3-am642-evm.dts
arch/arm64/boot/dts/ti/k3-am642-sk.dts

index fdcacf7..375078c 100644 (file)
                clocks = <&k3_clks 141 0>;
                dmas = <&main_pktdma 0xc300 0>, <&main_pktdma 0x4300 0>;
                dma-names = "tx0", "rx0";
+               status = "disabled";
        };
 
        main_spi1: spi@20110000 {
                #size-cells = <0>;
                power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 142 0>;
+               status = "disabled";
        };
 
        main_spi2: spi@20120000 {
                #size-cells = <0>;
                power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 143 0>;
+               status = "disabled";
        };
 
        main_spi3: spi@20130000 {
                #size-cells = <0>;
                power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 144 0>;
+               status = "disabled";
        };
 
        main_spi4: spi@20140000 {
                #size-cells = <0>;
                power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 145 0>;
+               status = "disabled";
        };
 
        main_gpio_intr: interrupt-controller@a00000 {
index 5ce8ceb..38ddf0b 100644 (file)
@@ -60,6 +60,7 @@
                #size-cells = <0>;
                power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 147 0>;
+               status = "disabled";
        };
 
        mcu_spi1: spi@4b10000 {
@@ -70,6 +71,7 @@
                #size-cells = <0>;
                power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 148 0>;
+               status = "disabled";
        };
 
        mcu_gpio_intr: interrupt-controller@4210000 {
index 3903e90..12d971c 100644 (file)
        status = "reserved";
 };
 
-&mcu_spi0 {
-       status = "disabled";
-};
-
-&mcu_spi1 {
-       status = "disabled";
-};
-
 &main_spi0 {
+       status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_spi0_pins_default>;
        ti,pindir-d0-out-d1-in;
index 56763d8..1a11659 100644 (file)
        };
 };
 
-&mcu_spi0 {
-       status = "disabled";
-};
-
-&mcu_spi1 {
-       status = "disabled";
-};
-
 /* mcu_gpio0 is reserved for mcu firmware usage */
 &mcu_gpio0 {
        status = "reserved";