riscv: dts: starfive: Add mmc node

Adds the mmc node for the StarFive JH7110 SoC.
Set mmco node to emmc and set mmc1 node to sd.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 1155b97..7684bf7 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -134,6 +134,29 @@
        status = "okay";
 };
 
+&mmc0 {
+       max-frequency = <100000000>;
+       bus-width = <8>;
+       cap-mmc-highspeed;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       non-removable;
+       cap-mmc-hw-reset;
+       post-power-on-delay-ms = <200>;
+       status = "okay";
+};
+
+&mmc1 {
+       max-frequency = <100000000>;
+       bus-width = <4>;
+       no-sdio;
+       no-mmc;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       status = "okay";
+};
+
 &sysgpio {
        i2c0_pins: i2c0-0 {
                i2c-pins {

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 413ee61..1a16f3b 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -560,6 +560,38 @@
                                 <&syscrg JH7110_SYSRST_WDT_CORE>;
                };
 
+               mmc0: mmc@16010000 {
+                       compatible = "starfive,jh7110-mmc";
+                       reg = <0x0 0x16010000 0x0 0x10000>;
+                       clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>,
+                                <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
+                       clock-names = "biu","ciu";
+                       resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>;
+                       reset-names = "reset";
+                       interrupts = <74>;
+                       fifo-depth = <32>;
+                       fifo-watermark-aligned;
+                       data-addr = <0>;
+                       starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>;
+                       status = "disabled";
+               };
+
+               mmc1: mmc@16020000 {
+                       compatible = "starfive,jh7110-mmc";
+                       reg = <0x0 0x16020000 0x0 0x10000>;
+                       clocks = <&syscrg JH7110_SYSCLK_SDIO1_AHB>,
+                                <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
+                       clock-names = "biu","ciu";
+                       resets = <&syscrg JH7110_SYSRST_SDIO1_AHB>;
+                       reset-names = "reset";
+                       interrupts = <75>;
+                       fifo-depth = <32>;
+                       fifo-watermark-aligned;
+                       data-addr = <0>;
+                       starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>;
+                       status = "disabled";
+               };
+
                aoncrg: clock-controller@17000000 {
                        compatible = "starfive,jh7110-aoncrg";
                        reg = <0x0 0x17000000 0x0 0x10000>;