usb: dwc2: Add host clock gating support functions

Added host clock gating support functions according
programming guide.

Added function names:
dwc2_host_enter_clock_gating()
dwc2_host_exit_clock_gating()

Acked-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Signed-off-by: Artur Petrosyan <Arthur.Petrosyan@synopsys.com>
Link: https://lore.kernel.org/r/20210413073615.B3E84A022E@mailhost.synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index e559779..8c12b30 100644 (file)
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -1486,6 +1486,8 @@ int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg,
 int dwc2_host_enter_partial_power_down(struct dwc2_hsotg *hsotg);
 int dwc2_host_exit_partial_power_down(struct dwc2_hsotg *hsotg,
                                      int rem_wakeup, bool restore);
+void dwc2_host_enter_clock_gating(struct dwc2_hsotg *hsotg);
+void dwc2_host_exit_clock_gating(struct dwc2_hsotg *hsotg, int rem_wakeup);
 bool dwc2_host_can_poweroff_phy(struct dwc2_hsotg *dwc2);
 static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg)
 { schedule_work(&hsotg->phy_reset_work); }
@@ -1521,6 +1523,9 @@ static inline int dwc2_host_enter_partial_power_down(struct dwc2_hsotg *hsotg)
 static inline int dwc2_host_exit_partial_power_down(struct dwc2_hsotg *hsotg,
                                                    int rem_wakeup, bool restore)
 { return 0; }
+static inline void dwc2_host_enter_clock_gating(struct dwc2_hsotg *hsotg) {}
+static inline void dwc2_host_exit_clock_gating(struct dwc2_hsotg *hsotg,
+                                              int rem_wakeup) {}
 static inline bool dwc2_host_can_poweroff_phy(struct dwc2_hsotg *dwc2)
 { return false; }
 static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg) {}

diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index f096006..f1c24c1 100644 (file)
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -5821,3 +5821,89 @@ int dwc2_host_exit_partial_power_down(struct dwc2_hsotg *hsotg,
        dev_dbg(hsotg->dev, "Exiting host partial power down completed.\n");
        return ret;
 }
+
+/**
+ * dwc2_host_enter_clock_gating() - Put controller in clock gating.
+ *
+ * @hsotg: Programming view of the DWC_otg controller
+ *
+ * This function is for entering Host mode clock gating.
+ */
+void dwc2_host_enter_clock_gating(struct dwc2_hsotg *hsotg)
+{
+       u32 hprt0;
+       u32 pcgctl;
+
+       dev_dbg(hsotg->dev, "Entering host clock gating.\n");
+
+       /* Put this port in suspend mode. */
+       hprt0 = dwc2_read_hprt0(hsotg);
+       hprt0 |= HPRT0_SUSP;
+       dwc2_writel(hsotg, hprt0, HPRT0);
+
+       /* Set the Phy Clock bit as suspend is received. */
+       pcgctl = dwc2_readl(hsotg, PCGCTL);
+       pcgctl |= PCGCTL_STOPPCLK;
+       dwc2_writel(hsotg, pcgctl, PCGCTL);
+       udelay(5);
+
+       /* Set the Gate hclk as suspend is received. */
+       pcgctl = dwc2_readl(hsotg, PCGCTL);
+       pcgctl |= PCGCTL_GATEHCLK;
+       dwc2_writel(hsotg, pcgctl, PCGCTL);
+       udelay(5);
+
+       hsotg->bus_suspended = true;
+       hsotg->lx_state = DWC2_L2;
+}
+
+/**
+ * dwc2_host_exit_clock_gating() - Exit controller from clock gating.
+ *
+ * @hsotg: Programming view of the DWC_otg controller
+ * @rem_wakeup: indicates whether resume is initiated by remote wakeup
+ *
+ * This function is for exiting Host mode clock gating.
+ */
+void dwc2_host_exit_clock_gating(struct dwc2_hsotg *hsotg, int rem_wakeup)
+{
+       u32 hprt0;
+       u32 pcgctl;
+
+       dev_dbg(hsotg->dev, "Exiting host clock gating.\n");
+
+       /* Clear the Gate hclk. */
+       pcgctl = dwc2_readl(hsotg, PCGCTL);
+       pcgctl &= ~PCGCTL_GATEHCLK;
+       dwc2_writel(hsotg, pcgctl, PCGCTL);
+       udelay(5);
+
+       /* Phy Clock bit. */
+       pcgctl = dwc2_readl(hsotg, PCGCTL);
+       pcgctl &= ~PCGCTL_STOPPCLK;
+       dwc2_writel(hsotg, pcgctl, PCGCTL);
+       udelay(5);
+
+       /* Drive resume signaling and exit suspend mode on the port. */
+       hprt0 = dwc2_read_hprt0(hsotg);
+       hprt0 |= HPRT0_RES;
+       hprt0 &= ~HPRT0_SUSP;
+       dwc2_writel(hsotg, hprt0, HPRT0);
+       udelay(5);
+
+       if (!rem_wakeup) {
+               /* In case of port resume need to wait for 40 ms */
+               msleep(USB_RESUME_TIMEOUT);
+
+               /* Stop driveing resume signaling on the port. */
+               hprt0 = dwc2_read_hprt0(hsotg);
+               hprt0 &= ~HPRT0_RES;
+               dwc2_writel(hsotg, hprt0, HPRT0);
+
+               hsotg->bus_suspended = false;
+               hsotg->lx_state = DWC2_L0;
+       } else {
+               mod_timer(&hsotg->wkp_timer,
+                         jiffies + msecs_to_jiffies(71));
+       }
+}