drm/amdgpu: handle denied inject error into critical regions v2
authorStanley.Yang <Stanley.Yang@amd.com>
Tue, 11 Jan 2022 06:14:50 +0000 (14:14 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Jan 2022 22:22:36 +0000 (17:22 -0500)
Changed from v1:
    remove unused brace

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
drivers/gpu/drm/amd/amdgpu/ta_ras_if.h

index c984b5a..5c9b67a 100644 (file)
@@ -1335,6 +1335,11 @@ static void psp_ras_ta_check_status(struct psp_context *psp)
                break;
        case TA_RAS_STATUS__SUCCESS:
                break;
+       case TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED:
+               if (ras_cmd->cmd_id == TA_RAS_COMMAND__TRIGGER_ERROR)
+                       dev_warn(psp->adev->dev,
+                                       "RAS WARNING: Inject error to critical region is not allowed\n");
+               break;
        default:
                dev_warn(psp->adev->dev,
                                "RAS WARNING: ras status = 0x%X\n", ras_cmd->ras_status);
@@ -1547,7 +1552,9 @@ int psp_ras_trigger_error(struct psp_context *psp,
        if (amdgpu_ras_intr_triggered())
                return 0;
 
-       if (ras_cmd->ras_status)
+       if (ras_cmd->ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED)
+               return -EACCES;
+       else if (ras_cmd->ras_status)
                return -EINVAL;
 
        return 0;
index 0bb6b53..3538032 100644 (file)
@@ -455,7 +455,7 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f,
        }
 
        if (ret)
-               return -EINVAL;
+               return ret;
 
        return size;
 }
index 5093826..509d8a1 100644 (file)
@@ -64,7 +64,8 @@ enum ta_ras_status {
        TA_RAS_STATUS__ERROR_PCS_STATE_ERROR            = 0xA016,
        TA_RAS_STATUS__ERROR_PCS_STATE_HANG             = 0xA017,
        TA_RAS_STATUS__ERROR_PCS_STATE_UNKNOWN          = 0xA018,
-       TA_RAS_STATUS__ERROR_UNSUPPORTED_ERROR_INJ      = 0xA019
+       TA_RAS_STATUS__ERROR_UNSUPPORTED_ERROR_INJ      = 0xA019,
+       TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED          = 0xA01A
 };
 
 enum ta_ras_block {