riscv: Move Andes PLMT driver to drivers/timer

This is a regular timer driver, and should live with the other timer
drivers.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index fc4fad4..5d02235 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -938,6 +938,7 @@ S:  Maintained
 T:     git https://gitlab.denx.de/u-boot/custodians/u-boot-riscv.git
 F:     arch/riscv/
 F:     cmd/riscv/
+F:     drivers/timer/andes_plmt_timer.c
 F:     tools/prelink-riscv.c
 
 RISC-V KENDRYTE

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 7560476..30b0540 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -170,13 +170,6 @@ config ANDES_PLIC
          The Andes PLIC block holds memory-mapped claim and pending registers
          associated with software interrupt.
 
-config ANDES_PLMT
-       bool
-       depends on RISCV_MMODE || SPL_RISCV_MMODE
-       help
-         The Andes PLMT block holds memory-mapped mtime register
-         associated with timer tick.
-
 config SYS_MALLOC_F_LEN
        default 0x1000
 

diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 10ac5b0..12c14f2 100644 (file)
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -13,7 +13,6 @@ obj-y += cache.o
 ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y)
 obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o
 obj-$(CONFIG_ANDES_PLIC) += andes_plic.o
-obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o
 else
 obj-$(CONFIG_SBI) += sbi.o
 obj-$(CONFIG_SBI_IPI) += sbi_ipi.o

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index f8fa4aa..6b8e4c9 100644 (file)
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -53,6 +53,13 @@ config ALTERA_TIMER
          Select this to enable a timer for Altera devices. Please find
          details on the "Embedded Peripherals IP User Guide" of Altera.
 
+config ANDES_PLMT
+       bool
+       depends on RISCV_MMODE || SPL_RISCV_MMODE
+       help
+         The Andes PLMT block holds memory-mapped mtime register
+         associated with timer tick.
+
 config ARC_TIMER
        bool "ARC timer support"
        depends on TIMER && ARC && CLK

diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 3a4d74b..dd4f9cc 100644 (file)
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -5,6 +5,7 @@
 obj-y += timer-uclass.o
 obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
 obj-$(CONFIG_ALTERA_TIMER)     += altera_timer.o
+obj-$(CONFIG_ANDES_PLMT) += andes_plmt_timer.o
 obj-$(CONFIG_ARC_TIMER)        += arc_timer.o
 obj-$(CONFIG_AST_TIMER)        += ast_timer.o
 obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o

diff --git a/arch/riscv/lib/andes_plmt.c b/drivers/timer/andes_plmt_timer.c
similarity index 100%
rename from arch/riscv/lib/andes_plmt.c
rename to drivers/timer/andes_plmt_timer.c