LiveInterval, etc to raw_ostream.
llvm-svn: 76965
class MachineInstr;
class MachineRegisterInfo;
class TargetRegisterInfo;
+ class raw_ostream;
/// VNInfo - Value Number Information.
/// This class holds information about a machine level values, including
void dump() const;
void print(std::ostream &os) const;
void print(std::ostream *os) const { if (os) print(*os); }
+ void print(raw_ostream &os) const;
+ void print(raw_ostream *os) const { if (os) print(*os); }
private:
LiveRange(); // DO NOT IMPLEMENT
};
std::ostream& operator<<(std::ostream& os, const LiveRange &LR);
+ raw_ostream& operator<<(raw_ostream& os, const LiveRange &LR);
inline bool operator<(unsigned V, const LiveRange &LR) {
void print(std::ostream *OS, const TargetRegisterInfo *TRI = 0) const {
if (OS) print(*OS, TRI);
}
+ void print(raw_ostream &OS, const TargetRegisterInfo *TRI = 0) const;
+ void print(raw_ostream *OS, const TargetRegisterInfo *TRI = 0) const {
+ if (OS) print(*OS, TRI);
+ }
void dump() const;
private:
LI.print(OS);
return OS;
}
+ inline raw_ostream &operator<<(raw_ostream &OS, const LiveInterval &LI) {
+ LI.print(OS);
+ return OS;
+ }
}
#endif
class BasicBlock;
class MachineFunction;
+class raw_ostream;
template <>
struct ilist_traits<MachineInstr> : public ilist_default_traits<MachineInstr> {
void dump() const;
void print(std::ostream &OS) const;
void print(std::ostream *OS) const { if (OS) print(*OS); }
+ void print(raw_ostream &OS) const;
+ void print(raw_ostream *OS) const { if (OS) print(*OS); }
/// getNumber - MachineBasicBlocks are uniquely numbered at the function
/// level, unless they're not in a MachineFunction yet, in which case this
};
std::ostream& operator<<(std::ostream &OS, const MachineBasicBlock &MBB);
+raw_ostream& operator<<(raw_ostream &OS, const MachineBasicBlock &MBB);
//===--------------------------------------------------------------------===//
// GraphTraits specializations for machine basic block graphs (machine-CFGs)
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Streams.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include <algorithm>
#include <ostream>
std::ostream& llvm::operator<<(std::ostream& os, const LiveRange &LR) {
return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")";
}
+raw_ostream& llvm::operator<<(raw_ostream& os, const LiveRange &LR) {
+ return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")";
+}
void LiveRange::dump() const {
cerr << *this << "\n";
void LiveInterval::print(std::ostream &OS,
const TargetRegisterInfo *TRI) const {
+ raw_os_ostream RawOS(OS);
+ print(RawOS, TRI);
+}
+
+void LiveInterval::print(raw_ostream &OS,
+ const TargetRegisterInfo *TRI) const {
if (isStackSlot())
OS << "SS#" << getStackSlotIndex();
else if (TRI && TargetRegisterInfo::isPhysicalRegister(reg))
void LiveRange::print(std::ostream &os) const {
os << *this;
}
+void LiveRange::print(raw_ostream &os) const {
+ os << *this;
+}
#include "llvm/Target/TargetInstrDesc.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/LeakDetector.h"
+#include "llvm/Support/raw_ostream.h"
#include <algorithm>
using namespace llvm;
MBB.print(OS);
return OS;
}
+raw_ostream& llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
+ MBB.print(OS);
+ return OS;
+}
/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the
/// parent pointer of the MBB, the MBB numbering, and any instructions in the
print(*cerr.stream());
}
-static inline void OutputReg(std::ostream &os, unsigned RegNo,
+static inline void OutputReg(raw_ostream &os, unsigned RegNo,
const TargetRegisterInfo *TRI = 0) {
if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) {
if (TRI)
}
void MachineBasicBlock::print(std::ostream &OS) const {
+ raw_os_ostream RawOS(OS);
+ print(RawOS);
+}
+
+void MachineBasicBlock::print(raw_ostream &OS) const {
const MachineFunction *MF = getParent();
if(!MF) {
OS << "Can't print out MachineBasicBlock because parent MachineFunction"
void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
if (!SU->getNode()) {
- cerr << "PHYS REG COPY\n";
+ errs() << "PHYS REG COPY\n";
return;
}
SU->getNode()->dump(DAG);
- cerr << "\n";
+ errs() << "\n";
SmallVector<SDNode *, 4> FlaggedNodes;
for (SDNode *N = SU->getNode()->getFlaggedNode(); N; N = N->getFlaggedNode())
FlaggedNodes.push_back(N);
while (!FlaggedNodes.empty()) {
- cerr << " ";
+ errs() << " ";
FlaggedNodes.back()->dump(DAG);
- cerr << "\n";
+ errs() << "\n";
FlaggedNodes.pop_back();
}
}
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DepthFirstIterator.h"
}
void VirtRegMap::print(std::ostream &OS, const Module* M) const {
+ raw_os_ostream RawOS(OS);
+ print(RawOS, M);
+}
+
+void VirtRegMap::print(raw_ostream &OS, const Module* M) const {
const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
OS << "********** REGISTER MAP **********\n";
class MachineRegisterInfo;
class TargetInstrInfo;
class TargetRegisterInfo;
+ class raw_ostream;
class VirtRegMap : public MachineFunctionPass {
public:
void print(std::ostream &OS, const Module* M = 0) const;
void print(std::ostream *OS) const { if (OS) print(*OS); }
+ void print(raw_ostream &OS, const Module* M = 0) const;
+ void print(raw_ostream *OS) const { if (OS) print(*OS); }
void dump() const;
};
VRM.print(OS);
return OS;
}
+ inline raw_ostream *operator<<(raw_ostream *OS, const VirtRegMap &VRM) {
+ VRM.print(OS);
+ return OS;
+ }
+ inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
+ VRM.print(OS);
+ return OS;
+ }
} // End llvm namespace
#endif
// operator<< - Used for debugging purposes.
//
-static std::ostream& operator<<(std::ostream &O,
- const LowerSwitch::CaseVector &C) {
+static raw_ostream& operator<<(raw_ostream &O,
+ const LowerSwitch::CaseVector &C) {
O << "[";
for (LowerSwitch::CaseVector::const_iterator B = C.begin(),
}
static OStream& operator<<(OStream &O, const LowerSwitch::CaseVector &C) {
- if (O.stream()) *O.stream() << C;
+ if (O.stream()) {
+ raw_os_ostream OS(*O.stream());
+ OS << C;
+ }
return O;
}