radv: reserve space for shadowed regs
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Thu, 15 Jun 2023 09:34:09 +0000 (11:34 +0200)
committerMarge Bot <emma+marge@anholt.net>
Mon, 19 Jun 2023 07:07:37 +0000 (07:07 +0000)
Tested on RDNA2, hopefully the space reservation is large enough for
other chips as well.

Fixes: 7893040f807f ("radv: Add stricter space checks.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23672>

src/amd/vulkan/radv_cp_reg_shadowing.c

index 9f0aae8..c886f04 100644 (file)
@@ -46,6 +46,8 @@ radv_create_shadow_regs_preamble(const struct radv_device *device, struct radv_q
    if (!cs)
       return VK_ERROR_OUT_OF_HOST_MEMORY;
 
+   radeon_check_space(ws, cs, 256);
+
    /* allocate memory for queue_state->shadowed_regs where register states are saved */
    result = ws->buffer_create(ws, SI_SHADOWED_REG_BUFFER_SIZE, 4096, RADEON_DOMAIN_VRAM,
                               RADEON_FLAG_ZERO_VRAM | RADEON_FLAG_NO_INTERPROCESS_SHARING, RADV_BO_PRIORITY_SCRATCH, 0,
@@ -132,6 +134,9 @@ radv_init_shadowed_regs_buffer_state(const struct radv_device *device, struct ra
    cs = ws->cs_create(ws, AMD_IP_GFX, false);
    if (!cs)
       return VK_ERROR_OUT_OF_HOST_MEMORY;
+
+   radeon_check_space(ws, cs, 768);
+
    radv_emit_shadow_regs_preamble(cs, device, &queue->state);
    ac_emulate_clear_state(info, cs, radv_set_context_reg_array);