ARM: mm: remove broken condition check for v4 flushing
authorWill Deacon <will.deacon@arm.com>
Tue, 22 Jan 2013 19:11:38 +0000 (19:11 +0000)
committerWill Deacon <will.deacon@arm.com>
Tue, 26 Mar 2013 09:55:34 +0000 (09:55 +0000)
There's no point having a conditional cache flush if we don't know the
state of the condition beforehand.

This patch makes the cacheflush in v4_flush_user_cache_range
unconditional.

signed-off-by: will deacon <will.deacon@arm.com>

arch/arm/mm/cache-v4.S

index 43e5d77..a7ba68f 100644 (file)
@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all)
 ENTRY(v4_flush_user_cache_range)
 #ifdef CONFIG_CPU_CP15
        mov     ip, #0
-       mcreq   p15, 0, ip, c7, c7, 0           @ flush ID cache
+       mcr     p15, 0, ip, c7, c7, 0           @ flush ID cache
        mov     pc, lr
 #else
        /* FALLTHROUGH */