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arm64: dts: qcom: sm8150: fix up primary USB nodes
author
Jonathan Marek
<jonathan@marek.ca>
Tue, 18 Aug 2020 16:04:43 +0000
(12:04 -0400)
committer
Bjorn Andersson
<bjorn.andersson@linaro.org>
Sun, 30 Aug 2020 17:23:55 +0000
(17:23 +0000)
The compatible for hsphy has out of place indentation, and the assigned
clock rate for GCC_USB30_PRIM_MASTER_CLK is incorrect, the clock doesn't
support a rate of
150000000
. Use a rate of
200000000
to match downstream.
Fixes:
b33d2868e8d3
("arm64: dts: qcom: sm8150: Add USB and PHY device nodes")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link:
https://lore.kernel.org/r/20200818160445.14008-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sm8150.dtsi
patch
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diff --git
a/arch/arm64/boot/dts/qcom/sm8150.dtsi
b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index
b86a7ea
..
ab8680c
100644
(file)
--- a/
arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/
arch/arm64/boot/dts/qcom/sm8150.dtsi
@@
-767,7
+767,7
@@
usb_1_hsphy: phy@88e2000 {
compatible = "qcom,sm8150-usb-hs-phy",
-
"qcom,usb-snps-hs-7nm-phy";
+ "qcom,usb-snps-hs-7nm-phy";
reg = <0 0x088e2000 0 0x400>;
status = "disabled";
#phy-cells = <0>;
@@
-833,7
+833,7
@@
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <
15
0000000>;
+ assigned-clock-rates = <19200000>, <
20
0000000>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,