int heads = nv_rd32(parent, 0x022448);
int ret;
+ if (nv_rd32(parent, 0x022500) & 0x00000001)
+ return -ENODEV;
+
ret = nouveau_disp_create(parent, engine, oclass, heads,
"PDISP", "display", &priv);
*pobject = nv_object(priv);
int heads = nv_rd32(parent, 0x022448);
int ret;
+ if (nv_rd32(parent, 0x022500) & 0x00000001)
+ return -ENODEV;
+
ret = nouveau_disp_create(parent, engine, oclass, heads,
"PDISP", "display", &priv);
*pobject = nv_object(priv);
int heads = nv_rd32(parent, 0x022448);
int ret;
+ if (nv_rd32(parent, 0x022500) & 0x00000001)
+ return -ENODEV;
+
ret = nouveau_disp_create(parent, engine, oclass, heads,
"PDISP", "display", &priv);
*pobject = nv_object(priv);
nouveau_bios_shadow_pramin(struct nouveau_bios *bios)
{
struct nouveau_device *device = nv_device(bios);
+ u64 addr = 0;
u32 bar0 = 0;
int i;
if (device->card_type >= NV_50) {
- u64 addr = (u64)(nv_rd32(bios, 0x619f04) & 0xffffff00) << 8;
+ if ( device->card_type < NV_C0 ||
+ !(nv_rd32(bios, 0x022500) & 0x00000001))
+ addr = (u64)(nv_rd32(bios, 0x619f04) & 0xffffff00) << 8;
+
if (!addr) {
addr = (u64)nv_rd32(bios, 0x001700) << 16;
addr += 0xf0000;
return ret;
priv->base.pll_set = nvc0_devinit_pll_set;
+ if (nv_rd32(priv, 0x022500) & 0x00000001)
+ priv->base.post = true;
return 0;
}
struct nouveau_drm *drm = nouveau_drm(dev);
unsigned htotal;
- if (nv_device(drm->device)->card_type >= NV_50) {
- if (NVReadVgaCrtc(dev, 0, 0x00) == 0 &&
- NVReadVgaCrtc(dev, 0, 0x1a) == 0)
- return false;
+ if (nv_device(drm->device)->card_type >= NV_50)
return true;
- }
htotal = NVReadVgaCrtc(dev, 0, 0x06);
htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
-
return (htotal != 0);
}