drm/mediatek: adjust EDGE to match clock and data
authorchunhui dai <chunhui.dai@mediatek.com>
Wed, 3 Oct 2018 03:41:43 +0000 (11:41 +0800)
committerCK Hu <ck.hu@mediatek.com>
Wed, 3 Oct 2018 03:56:32 +0000 (11:56 +0800)
The default timing of DPI data and clock is not match.
We could adjust this bit to make them match.

Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
drivers/gpu/drm/mediatek/mtk_dpi.c
drivers/gpu/drm/mediatek/mtk_dpi_regs.h

index 72aa431..0ce4b61 100644 (file)
@@ -114,6 +114,7 @@ struct mtk_dpi_yc_limit {
 
 struct mtk_dpi_conf {
        u32 reg_h_fre_con;
+       bool edge_sel_en;
 };
 
 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
@@ -344,6 +345,12 @@ static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
        mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
 }
 
+static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi)
+{
+       if (dpi->conf->edge_sel_en)
+               mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);
+}
+
 static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
                                        enum mtk_dpi_out_color_format format)
 {
@@ -507,6 +514,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
        mtk_dpi_config_yc_map(dpi, dpi->yc_map);
        mtk_dpi_config_color_format(dpi, dpi->color_format);
        mtk_dpi_config_2n_h_fre(dpi);
+       mtk_dpi_config_disable_edge(dpi);
        mtk_dpi_sw_reset(dpi, false);
 
        return 0;
index 040444d..d9db8c4 100644 (file)
 #define ESAV_CODE2                     (0xFFF << 0)
 #define ESAV_CODE3_MSB                 BIT(16)
 
+#define EDGE_SEL_EN                    BIT(5)
 #define H_FRE_2N                       BIT(25)
 #endif /* __MTK_DPI_REGS_H */