clk: stm32: Fix a signedness issue in clk_stm32_composite_determine_rate()
authorDan Carpenter <dan.carpenter@linaro.org>
Tue, 10 Oct 2023 13:35:28 +0000 (16:35 +0300)
committerStephen Boyd <sboyd@kernel.org>
Fri, 13 Oct 2023 00:30:54 +0000 (17:30 -0700)
The divider_ro_round_rate() function could potentially return -EINVAL on
error but the error handling doesn't work because "rate" is unsigned.
It should be a type long.

Fixes: 06ed0fc0fbac ("clk: stm32: composite: Switch to determine_rate")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/d9a78453-9b40-48c1-830e-00751ba3ecb8@kili.mountain
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/stm32/clk-stm32-core.c

index d5aa09e..067b918 100644 (file)
@@ -431,7 +431,7 @@ static int clk_stm32_composite_determine_rate(struct clk_hw *hw,
 {
        struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);
        const struct stm32_div_cfg *divider;
-       unsigned long rate;
+       long rate;
 
        if (composite->div_id == NO_STM32_DIV)
                return 0;