arm: DT: exynos: add exynos5422 DMC device

The patch adds a new file with Dynamic Controller device and
accosiated performance counters. It provides definition of used clocks
and register sets.

Change-Id: I71d31db1f4c4f2be174adc735662f4c35f4dcf7d
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>

diff --git a/arch/arm/boot/dts/exynos5422-dmc.dtsi b/arch/arm/boot/dts/exynos5422-dmc.dtsi
new file mode 100644 (file)
index 0000000..aca78c0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5422-dmc.dtsi
@@ -0,0 +1,92 @@
+//SPDIX
+
+&soc {
+       ppmu_dmc0_0: ppmu_dmc0_0@10d00000 {
+               compatible = "samsung,exynos-ppmu";
+               reg = <0x10d00000 0x2000>;
+               clocks = <&clock CLK_PCLK_PPMU_DREX0_0>;
+               clock-names = "ppmu";
+               status = "okay";
+               events {
+                       ppmu_event_dmc0_0: ppmu-event3-dmc0_0 {
+                               event-name = "ppmu-event3-dmc0_0";
+                       };
+               };
+       };
+
+
+       ppmu_dmc0_1: ppmu_dmc0_1@10d10000 {
+               compatible = "samsung,exynos-ppmu";
+               reg = <0x10d10000 0x2000>;
+               clocks = <&clock CLK_PCLK_PPMU_DREX0_1>;
+               clock-names = "ppmu";
+               status = "okay";
+               events {
+                       ppmu_event_dmc0_1: ppmu-event3-dmc0_1 {
+                               event-name = "ppmu-event3-dmc0_1";
+                       };
+               };
+       };
+
+       ppmu_dmc1_0: ppmu_dmc1_0@10d10000 {
+               compatible = "samsung,exynos-ppmu";
+               reg = <0x10d60000 0x2000>;
+               clocks = <&clock CLK_PCLK_PPMU_DREX1_0>;
+               clock-names = "ppmu";
+               status = "okay";
+               events {
+                       ppmu_event_dmc1_0: ppmu-event3-dmc1_0 {
+                               event-name = "ppmu-event3-dmc1_0";
+                       };
+               };
+       };
+
+       ppmu_dmc1_1: ppmu_dmc1_1@10d70000 {
+               compatible = "samsung,exynos-ppmu";
+               reg = <0x10d70000 0x2000>;
+               clocks = <&clock CLK_PCLK_PPMU_DREX1_1>;
+               clock-names = "ppmu";
+               status = "okay";
+               events {
+                       ppmu_event_dmc1_1: ppmu-event3-dmc1_1 {
+                               event-name = "ppmu-event3-dmc1_1";
+                       };
+               };
+       };
+
+       dmc: dmc@10c20000 {
+               compatible = "samsung,exynos5422-dmc";
+               reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>,
+                       <0x10030000 0x1000>, <0x10000000 0x1000>;
+               clocks =        <&clock CLK_FOUT_SPLL>,
+                               <&clock CLK_MOUT_SCLK_SPLL>,
+                               <&clock CLK_FF_DOUT_SPLL2>,
+                               <&clock CLK_FOUT_BPLL>,
+                               <&clock CLK_MOUT_BPLL>,
+                               <&clock CLK_SCLK_BPLL>,
+                               <&clock CLK_MOUT_MX_MSPLL_CCORE>,
+                               <&clock CLK_MOUT_MX_MSPLL_CCORE_PHY>,
+                               <&clock CLK_MOUT_MCLK_CDREX>,
+                               <&clock CLK_DOUT_CLK2X_PHY0>,
+                               <&clock CLK_CLKM_PHY0>,
+                               <&clock CLK_CLKM_PHY1>
+                       ;
+               clock-names =   "fout_spll",
+                               "mout_sclk_spll",
+                               "ff_dout_spll2",
+                               "fout_bpll",
+                               "mout_bpll",
+                               "sclk_bpll",
+                               "mout_mx_mspll_ccore",
+                               "mout_mx_mspll_ccore_phy",
+                               "mout_mclk_cdrex",
+                               "dout_clk2x_phy0",
+                               "clkm_phy0",
+                               "clkm_phy1"
+                               ;
+
+               devfreq-events = <&ppmu_dmc0_0>, <&ppmu_dmc0_1>,
+                               <&ppmu_dmc1_0>, <&ppmu_dmc1_1>;
+       };
+
+};

diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 8e56aa2..e67b59e 100644 (file)
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -15,6 +15,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "exynos5800.dtsi"
 #include "exynos5422-cpus.dtsi"
+#include "exynos5422-dmc.dtsi"
 
 / {
        memory@40000000 {