ARM: dts: imx6q-apalis: mux RESET_MOCI# signal
authorStefan Agner <stefan@agner.ch>
Thu, 6 Sep 2018 23:46:58 +0000 (16:46 -0700)
committerShawn Guo <shawnguo@kernel.org>
Mon, 10 Sep 2018 01:08:57 +0000 (09:08 +0800)
The pinctrl properties on the IOMUXC node get overwritten by the
carrier board level device tree, hence the pinctrl_reset_moci
pinctrl does not get applied.

Associate the pinctrl_reset_moci pinctrl with the PCIe node where
we also make use of the pin as a reset GPIO.

Since the pin is muxed as a GPIO by default not muxing it explicitly
worked fine in practise.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6q-apalis-eval.dts
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
arch/arm/boot/dts/imx6q-apalis-ixora.dts
arch/arm/boot/dts/imx6qdl-apalis.dtsi

index 707ac9a..0edd304 100644 (file)
 };
 
 &pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_reset_moci>;
        /* active-high meaning opposite of regular PERST# active-low polarity */
        reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
        reset-gpio-active-high;
index 4e1c8fe..b94bb68 100644 (file)
 };
 
 &pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_reset_moci>;
        /* active-high meaning opposite of regular PERST# active-low polarity */
        reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
        reset-gpio-active-high;
index 469e3d0..302fd6a 100644 (file)
 };
 
 &pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_reset_moci>;
        /* active-high meaning opposite of regular PERST# active-low polarity */
        reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
        reset-gpio-active-high;
index 05f07ea..3dc99dd 100644 (file)
 };
 
 &iomuxc {
-       /* pins used on module */
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_reset_moci>;
-
        pinctrl_apalis_gpio1: gpio2io04grp {
                fsl,pins = <
                        MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0