net: dsa: mv88e6xxx: Correct spelling of define "ADRR" -> "ADDR"

Because ADRR is not a thing.

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 9ff1a10..eca285a 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -1440,7 +1440,7 @@ static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port)
                         * the special "LAG device" in the PVT, using
                         * the LAG ID as the port number.
                         */
-                       dev = MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK;
+                       dev = MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK;
                        port = dsa_lag_id(dst, dp->lag_dev);
                }
        }

diff --git a/drivers/net/dsa/mv88e6xxx/global2.h b/drivers/net/dsa/mv88e6xxx/global2.h
index c78769c..8f85c23 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/global2.h
+++ b/drivers/net/dsa/mv88e6xxx/global2.h
@@ -109,7 +109,7 @@
 #define MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN   0x3000
 #define MV88E6XXX_G2_PVT_ADDR_OP_READ          0x4000
 #define MV88E6XXX_G2_PVT_ADDR_PTR_MASK         0x01ff
-#define MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK                0x1f
+#define MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK                0x1f
 
 /* Offset 0x0C: Cross-chip Port VLAN Data Register */
 #define MV88E6XXX_G2_PVT_DATA          0x0c