compatible = "simple-bus";
ranges;
- reset: reset-sample {
- compatible = "thead,reset-sample";
- plic-delegate = <0x0 0x101ffffc>;
- };
-
clint0: clint@14000000 {
compatible = "riscv,clint0";
interrupts-extended = <
intc: interrupt-controller@10000000 {
#interrupt-cells = <1>;
- compatible = "riscv,plic0";
+ compatible = "allwinner,sun20i-d1-plic",
+ "thead,c900-plic";
interrupt-controller;
interrupts-extended = <
&cpu0_intc 0xffffffff &cpu0_intc 9
reset: reset-sample {
compatible = "thead,reset-sample";
- plic-delegate = <0xff 0xd81ffffc>;
entry-reg = <0xff 0xff019050>;
entry-cnt = <4>;
control-reg = <0xff 0xff015004>;
intc: interrupt-controller@ffd8000000 {
#interrupt-cells = <1>;
- compatible = "riscv,plic0";
+ compatible = "thead,c900-plic";
interrupt-controller;
interrupts-extended = <
&cpu0_intc 0xffffffff &cpu0_intc 9
```
reset: reset-sample {
compatible = "thead,reset-sample";
- plic-delegate = <0xff 0xd81ffffc>;
using-csr-reset;
csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
0x3b0 0x3b1 0x3b2 0x3b3
#include <libfdt.h>
#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
#include <sbi/sbi_error.h>
#include <sbi/sbi_hartmask.h>
#include <sbi_utils/fdt/fdt_helper.h>
if (rc)
return rc;
+ if (match->data) {
+ void (*plic_plat_init)(struct plic_data *) = match->data;
+ plic_plat_init(pd);
+ }
+
rc = plic_cold_irqchip_init(pd);
if (rc)
return rc;
return irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
}
+#define THEAD_PLIC_CTRL_REG 0x1ffffc
+
+static void thead_plic_plat_init(struct plic_data *pd)
+{
+ writel_relaxed(BIT(0), (void *)pd->addr + THEAD_PLIC_CTRL_REG);
+}
+
static const struct fdt_match irqchip_plic_match[] = {
{ .compatible = "riscv,plic0" },
{ .compatible = "sifive,plic-1.0.0" },
+ { .compatible = "thead,c900-plic",
+ .data = thead_plic_plat_init },
{ },
};
clone_csrs(cnt);
}
-
- /* Delegate plic enable regs for S-mode */
- val = fdt_getprop(fdt, nodeoff, "plic-delegate", &len);
- if (len > 0 && val) {
- p = (void *)(ulong)fdt64_to_cpu(*val);
- writel(BIT(0), p);
- }
-
/* Old reset method for secondary harts */
if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) {
csr_write(0x7c7, (ulong)&__thead_pre_start_warm);