mtd: rawnand: brcmnand: fallback to detected ecc-strength, ecc-step-size

This change supports nand-ecc-step-size and nand-ecc-strength fields in
brcmnand DT node to be optional.
see: Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt

If both nand-ecc-strength and nand-ecc-step-size are not specified in
device tree node for NAND, raw NAND layer does detect ECC information by
reading ONFI extended parameter page for parts using ONFI >= 2.1.
In case of non-ONFI NAND parts there could be a nand_id table entry with
ECC information. If there is valid device tree entry for nand-ecc-strength
and nand-ecc-step-size fields it still shall override the detected values.

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index f368d1c..93ac1b5 100644 (file)
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2136,6 +2136,17 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
                return -EINVAL;
        }
 
+       if (chip->ecc.mode != NAND_ECC_NONE &&
+           (!chip->ecc.size || !chip->ecc.strength)) {
+               if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
+                       /* use detected ECC parameters */
+                       chip->ecc.size = chip->base.eccreq.step_size;
+                       chip->ecc.strength = chip->base.eccreq.strength;
+                       dev_info(ctrl->dev, "Using ECC step-size %d, strength %d\n",
+                               chip->ecc.size, chip->ecc.strength);
+               }
+       }
+
        switch (chip->ecc.size) {
        case 512:
                if (chip->ecc.algo == NAND_ECC_HAMMING)